re PR middle-end/18008 (Duplicate mask on bitfield insertion)

        PR middle-end/18008
        * c-decl.c (finish_struct): Set DECL_MODE after resetting a
        field's type.
        * expmed.c (store_fixed_bit_field): Create a paradoxical subreg
        if we don't need the bits above those present in the current mode.
        * expr.c (store_field): Strip conversions to odd-bit-sized types
        if the destination field width matches.

From-SVN: r94290

1 files changed, 15 insertions, 1 deletions

diff --git a/gcc/expr.c b/gcc/expr.c
index ed693a3..1f82b1d 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -5215,7 +5215,21 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
 	  && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
 	  && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
     {
-      rtx temp = expand_expr (exp, NULL_RTX, VOIDmode, 0);
+      rtx temp;
+
+      /* If EXP is a NOP_EXPR of precision less than its mode, then that
+	 implies a mask operation.  If the precision is the same size as
+	 the field we're storing into, that mask is redundant.  This is
+	 particularly common with bit field assignments generated by the
+	 C front end.  */
+      if (TREE_CODE (exp) == NOP_EXPR
+	  && INTEGRAL_TYPE_P (TREE_TYPE (exp))
+	  && (TYPE_PRECISION (TREE_TYPE (exp))
+	      < GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp))))
+	  && bitsize == TYPE_PRECISION (TREE_TYPE (exp)))
+	exp = TREE_OPERAND (exp, 0);
+
+      temp = expand_expr (exp, NULL_RTX, VOIDmode, 0);
 
       /* If BITSIZE is narrower than the size of the type of EXP
 	 we will be narrowing TEMP.  Normally, what's wanted are the