diff options
| author | Xi Ruoyao <xry111@mengyan1223.wang> | 2021-06-20 15:21:39 +0800 |
|---|---|---|
| committer | Xi Ruoyao <xry111@mengyan1223.wang> | 2021-07-31 00:55:22 +0800 |
| commit | 45cb789e6adf5d571c574a94b77413c845fed106 (patch) | |
| tree | dbda3d3f9db46e7f032e53aec9f310f2e5983664 /gcc/expr.c | |
| parent | 6cd005a255f15c1b4b3eaae71c844ea2592c9dce (diff) | |
| download | gcc-45cb789e6adf5d571c574a94b77413c845fed106.zip gcc-45cb789e6adf5d571c574a94b77413c845fed106.tar.gz gcc-45cb789e6adf5d571c574a94b77413c845fed106.tar.bz2 | |
mips: add MSA vec_cmp and vec_cmpu expand pattern [PR101132]
Middle-end started to emit vec_cmp and vec_cmpu since GCC 11, causing
ICE on MIPS with MSA enabled. Add the pattern to prevent it.
gcc/
PR target/101132
* config/mips/mips-protos.h (mips_expand_vec_cmp_expr): Declare.
* config/mips/mips.c (mips_expand_vec_cmp_expr): New function.
* config/mips/mips-msa.md (vec_cmp<MSA:mode><mode_i>): New
expander.
(vec_cmpu<IMSA:mode><mode_i>): New expander.
gcc/testsuite/
PR target/101132
* gcc.target/mips/pr101132.c: New test.
Diffstat (limited to 'gcc/expr.c')
0 files changed, 0 insertions, 0 deletions