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| author | Richard Biener <rguenther@suse.de> | 2021-07-05 15:51:49 +0200 |
|---|---|---|
| committer | Richard Biener <rguenther@suse.de> | 2021-07-06 11:56:47 +0200 |
| commit | 7d810646d421f6975300c0d06f4e9af27a48f26d (patch) | |
| tree | ab76365a066c48d72a332a290a099c3f3d53a335 /gcc/expr.c | |
| parent | 9f489a5731f12b8e6b49994e8f61acb5d26f508e (diff) | |
| download | gcc-7d810646d421f6975300c0d06f4e9af27a48f26d.zip gcc-7d810646d421f6975300c0d06f4e9af27a48f26d.tar.gz gcc-7d810646d421f6975300c0d06f4e9af27a48f26d.tar.bz2 | |
Add FMADDSUB and FMSUBADD SLP vectorization patterns and optabs
This adds named expanders for vec_fmaddsub<mode>4 and
vec_fmsubadd<mode>4 which map to x86 vfmaddsubXXXp{ds} and
vfmsubaddXXXp{ds} instructions. This complements the previous
addition of ADDSUB support.
x86 lacks SUBADD and the negate variants of FMA with mixed
plus minus so I did not add optabs or patterns for those but
it would not be difficult if there's a target that has them.
2021-07-05 Richard Biener <rguenther@suse.de>
* doc/md.texi (vec_fmaddsub<mode>4): Document.
(vec_fmsubadd<mode>4): Likewise.
* optabs.def (vec_fmaddsub$a4): Add.
(vec_fmsubadd$a4): Likewise.
* internal-fn.def (IFN_VEC_FMADDSUB): Add.
(IFN_VEC_FMSUBADD): Likewise.
* tree-vect-slp-patterns.c (addsub_pattern::recognize):
Refactor to handle IFN_VEC_FMADDSUB and IFN_VEC_FMSUBADD.
(addsub_pattern::build): Likewise.
* tree-vect-slp.c (vect_optimize_slp): CFN_VEC_FMADDSUB
and CFN_VEC_FMSUBADD are not transparent for permutes.
* config/i386/sse.md (vec_fmaddsub<mode>4): New expander.
(vec_fmsubadd<mode>4): Likewise.
* gcc.target/i386/vect-fmaddsubXXXpd.c: New testcase.
* gcc.target/i386/vect-fmaddsubXXXps.c: Likewise.
* gcc.target/i386/vect-fmsubaddXXXpd.c: Likewise.
* gcc.target/i386/vect-fmsubaddXXXps.c: Likewise.
Diffstat (limited to 'gcc/expr.c')
0 files changed, 0 insertions, 0 deletions