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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-09-05 19:57:39 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-09-05 19:57:39 +0000 |
| commit | 9da15d4097fa2fde5c2a5f1681db8fd04488a563 (patch) | |
| tree | 4f9be4daf0cecba38b9ccc0040c50f9f84bf3f6e /gcc/expr.c | |
| parent | ddc203a7b15306287792a3eed6abfe306e3d26ad (diff) | |
| download | gcc-9da15d4097fa2fde5c2a5f1681db8fd04488a563.zip gcc-9da15d4097fa2fde5c2a5f1681db8fd04488a563.tar.gz gcc-9da15d4097fa2fde5c2a5f1681db8fd04488a563.tar.bz2 | |
Make mode_for_vector return an opt_mode
...following on from the mode_for_size change. The patch also removes
machmode.h versions of the stor-layout.c comments, since the comments
in the .c file are more complete.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* machmode.h (mode_for_vector): Return an opt_mode.
* stor-layout.c (mode_for_vector): Likewise.
(mode_for_int_vector): Update accordingly.
(layout_type): Likewise.
* config/i386/i386.c (emit_memmov): Likewise.
(ix86_expand_set_or_movmem): Likewise.
(ix86_expand_vector_init): Likewise.
(ix86_get_mask_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_expand_vec_perm_const_1):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* optabs-query.c (can_vec_perm_p): Likewise.
(can_vec_mask_load_store_p): Likewise.
* optabs.c (expand_vec_perm): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-vect-stmts.c (vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(get_vectype_for_scalar_type_and_size): Likewise.
From-SVN: r251730
Diffstat (limited to 'gcc/expr.c')
| -rw-r--r-- | gcc/expr.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -9445,7 +9445,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, tree sel_type = TREE_TYPE (treeop2); machine_mode vmode = mode_for_vector (SCALAR_TYPE_MODE (TREE_TYPE (sel_type)), - TYPE_VECTOR_SUBPARTS (sel_type)); + TYPE_VECTOR_SUBPARTS (sel_type)).require (); gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT); op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0); gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR); |