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authorJim Wilson <jimw@sifive.com>2019-11-05 22:34:40 +0000
committerJim Wilson <wilson@gcc.gnu.org>2019-11-05 14:34:40 -0800
commita81ffd93b83c4be250514ff385b5b88fa5c3835b (patch)
tree9106ef9f8689bb7b61d0d78c63a1ad65f8dffe08 /gcc/expr.c
parent8aa76bb74696d0987e04a82ebcbc44f745ce788d (diff)
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Allow libcalls for complex memcpy when optimizing for size.
The RISC-V backend wants to use a libcall when optimizing for size if more than 6 instructions are needed. Emit_move_complex asks for no libcalls. This case requires 8 insns for rv64 and 16 insns for rv32, so we get fallback code that emits a loop. Commit_one_edge_insertion doesn't allow code inserted for a phi node on an edge to end with a branch, and so this triggers an assertion. This problem goes away if we allow libcalls when optimizing for size, which gives the code the RISC-V backend wants, and avoids triggering the assert. gcc/ PR middle-end/92263 * expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when optimize_insn_for_speed_p is true. gcc/testsuite/ PR middle-end/92263 * gcc.dg/pr92263.c: New. From-SVN: r277861
Diffstat (limited to 'gcc/expr.c')
-rw-r--r--gcc/expr.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/expr.c b/gcc/expr.c
index 06e934e..0fd5890f 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -3571,11 +3571,13 @@ emit_move_complex (machine_mode mode, rtx x, rtx y)
rtx_insn *ret;
/* For memory to memory moves, optimal behavior can be had with the
- existing block move logic. */
+ existing block move logic. But use normal expansion if optimizing
+ for size. */
if (MEM_P (x) && MEM_P (y))
{
emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode),
- BLOCK_OP_NO_LIBCALL);
+ (optimize_insn_for_speed_p()
+ ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL));
return get_last_insn ();
}