alias.c (record_set, [...]): Use REG_P.

2004-06-15  Jerry Quinn  <jlquinn@optonline.net>

	* alias.c (record_set, record_base_value, canon_rtx, get_addr,
	nonlocal_mentioned_p_1, init_alias_analysis): Use REG_P.
	* bt-load.c (find_btr_reference, insn_sets_btr_p, note_btr_set):
	Likewise.
	* builtins.c (expand_builtin_setjmp, expand_builtin_apply,
	expand_builtin_mathfn, expand_builtin_strlen, expand_builtin_memcmp,
	expand_builtin_strcmp, expand_builtin_strncmp,
	expand_builtin_frame_address): Likewise.
	* caller-save.c (mark_set_regs, add_stored_regs, mark_referenced_regs,
	insert_one_insn): Likewise.
	* calls.c (prepare_call_address, precompute_register_parameters,
	precompute_arguments, expand_call, emit_library_call_value_1): Likewise.
	* cfganal.c (flow_active_insn_p): Likewise.
	* combine.c (set_nonzero_bits_and_sign_copies, can_combine_p,
	combinable_i3pat, try_combine, find_split_point, COMBINE_RTX_EQUAL_P,
	subst, combine_simplify_rtx, simplify_if_then_else, simplify_set,
	make_extraction, recog_for_combine, gen_lowpart_for_combine,
	simplify_comparison, record_dead_and_set_regs_1,
	record_dead_and_set_regs, record_promoted_value,
	check_promoted_subreg, get_last_value_validate, get_last_value,
	reg_dead_at_p_1, reg_bitfield_target_p, distribute_notes,
	unmentioned_reg_p_1): Likewise.
	* conflict.c (mark_reg): Likewise.
	* cse.c (HASH, COST, COST_IN, approx_reg_cost_1, notreg_cost,
	mention_regs, insert_regs, lookup, lookup_for_remove, insert,
	merge_equiv_classes, flush_hash_table, invalidate,
	remove_invalid_refs, remove_invalid_subreg_refs, rehash_using_reg,
	invalidate_for_call, use_related_value, canon_hash, exp_equiv_p,
	cse_rtx_varies_p, canon_reg, find_best_addr, fold_rtx, equiv_constant,
	record_jump_cond, cse_insn, addr_affects_sp_p,
	invalidate_from_clobbers, cse_process_notes, cse_around_loop,
	cse_set_around_loop, count_reg_usage, set_live_p, cse_change_cc_mode,
	cse_cc_succs, cse_condition_code_reg): Likewise.
	* cselib.c (cselib_reg_set_mode, rtx_equal_for_cselib_p,
	cselib_lookup, cselib_invalidate_regno, cselib_invalidate_rtx,
	cselib_record_set, cselib_record_sets): Likewise.
	* dbxout.c (dbxout_symbol_location, dbxout_parms, dbxout_reg_parms,
	dbxout_block): Likewise.
	* df.c (df_ref_record, df_def_record_1, df_uses_record): Likewise.
	* dojump.c (do_jump): Likewise.
	* dwarf2out.c (dwarf2out_frame_debug_expr, is_pseudo_reg,
	is_based_loc, rtl_for_decl_location): Likewise.
	* emit-rtl.c (set_reg_attrs_for_parm, set_decl_rtl,
	set_decl_incoming_rtl, mark_user_reg): Likewise.
	* explow.c (copy_all_regs, copy_all_regs, memory_address, force_reg,
	copy_to_suggested_reg, allocate_dynamic_stack_space,
	probe_stack_range, hard_function_value): Likewise.
	* expmed.c (store_bit_field, store_fixed_bit_field,
	store_split_bit_field, extract_bit_field, extract_fixed_bit_field,
	extract_split_bit_field, expand_divmod, emit_store_flag_force):
	Likewise.
	* expr.c (convert_move, convert_modes,
	block_move_libcall_safe_for_call_parm, emit_group_load, use_reg,
	use_group_regs, emit_move_insn, emit_move_insn_1,
	compress_float_constant, push_block, emit_single_push_insn,
	emit_push_insn, get_subtarget, expand_assignment, store_expr,
	store_constructor, store_field, force_operand, safe_from_p,
	expand_expr_real_1, expand_increment, do_store_flag, do_tablejump):
	Likewise.
	* final.c (profile_function, final_scan_insn, alter_subreg,
	get_mem_expr_from_op, output_asm_operand_names, output_operand,
	only_leaf_regs_used, leaf_renumber_regs_insn): Likewise.
	* flow.c (verify_wide_reg_1, mark_regs_live_at_end,
	find_regno_partial, propagate_one_insn, init_propagate_block_info,
	insn_dead_p, libcall_dead_p, mark_set_1, not_reg_cond,
	attempt_auto_inc, find_auto_inc, mark_used_regs,
	count_or_remove_death_notes_bb): Likewise.
	* function.c (find_temp_slot_from_address, update_temp_slot_address,
	preserve_temp_slots, put_var_into_stack, fixup_var_refs_insn,
	fixup_var_refs_1, fixup_stack_1, optimize_bit_field, flush_addressof,
	put_addressof_into_stack, purge_addressof_1, insns_for_mem_walk,
	purge_single_hard_subreg_set, instantiate_decl,
	instantiate_virtual_regs_1, aggregate_value_p, assign_parms,
	promoted_input_arg, setjmp_vars_warning, setjmp_args_warning,
	setjmp_protect, setjmp_protect_args, fix_lexical_addr,
	expand_function_start, diddle_return_value, clobber_return_register,
	expand_function_end, keep_stack_depressed, handle_epilogue_set,
	update_epilogue_consts): Likewise.
	* genemit.c (gen_exp, gen_insn): Likewise.
	* genrecog.c (make_insn_sequence): Likewise.
	* global.c (global_conflicts, expand_preferences, mark_reg_store,
	mark_reg_conflicts, set_preference, reg_becomes_live,
	build_insn_chain, mark_reg_change): Likewise.
	* haifa_sched.c (CONST_BASED_ADDRESS_P, find_set_reg_weight):
	Likewise.
	* ifcvt.c (noce_try_abs, noce_get_condition, noce_process_if_block):
	Likewise.
	* integrate.c (copy_rtx_and_substitute, try_constants,
	subst_constants, mark_stores, allocate_initial_values): Likewise.
	* jump.c (reversed_comparison_code_parts, delete_prior_computation,
	delete_computation, rtx_renumbered_equal_p, true_regnum,
	reg_or_subregno): Likewise.
	* lcm.c (reg_dies, reg_becomes_live): Likewise.
	* local-alloc.c (validate_equiv_mem_from_store, validate_equiv_mem,
	update_equiv_regs, no_equiv, block_alloc, combine_regs, reg_is_set,
	wipe_dead_reg, no_conflict_p): Likewise.
	* loop-iv.c (simple_reg_p, simple_set_p, kill_sets,
	iv_get_reaching_def, iv_analyze_biv, altered_reg_used, mark_altered,
	simple_rhs_p, simplify_using_assignment, implies_p): Likewise.
	* loop.c (scan_loop, combine_movables, rtx_equal_for_loop_p,
	move_movables, note_set_pseudo_multiple_uses, consec_sets_invariant_p,
	find_single_use_in_loop, count_one_set, loop_bivs_init_find,
	loop_givs_rescan, check_insn_for_bivs, check_insn_for_givs,
	valid_initial_value_p, simplify_giv_expr, consec_sets_giv,
	loop_regs_update, check_dbra_loop, maybe_eliminate_biv,
	maybe_eliminate_biv_1, record_initial, update_reg_last_use,
	canonicalize_condition, loop_regs_scan, load_mems, try_copy_prop,
	try_swap_copy_prop): Likewise.
	* optabs.c (expand_binop, expand_vector_binop, expand_vector_unop,
	expand_abs, emit_no_conflict_block, emit_libcall_block, expand_float):
	Likewise.
	* postreload.c (reload_cse_simplify, reload_cse_simplify_set,
	reload_cse_simplify_operands, reload_combine,
	reload_combine_note_store, reload_combine_note_use,
	reload_cse_move2add, move2add_note_store): Likewise.
	* print-rtl.c (print_rtx): Likewise.
	* ra-build.c (copy_insn_p, remember_move, init_one_web_common,
	contains_pseudo, handle_asm_insn): Likewise.
	* ra-debug.c (ra_print_rtx_object, dump_constraints,
	dump_static_insn_cost): Likewise.
	* ra-rewrite.c (slots_overlap_p, emit_colors,
	remove_suspicious_death_notes): Likewise.
	* recog.c (validate_replace_rtx_1, find_single_use_1, find_single_use,
	register_operand, scratch_operand, nonmemory_operand,
	constrain_operands): Likewise.
	* reg-stack (check_asm_stack_operands, remove_regno_note,
	emit_swap_insn, swap_rtx_condition, subst_stack_regs_pat,
	subst_asm_stack_regs): Likewise.
	* regclass.c (scan_one_insn, record_reg_classes, copy_cost,
	record_address_regs, reg_scan_mark_refs): Likewise.
	* regmove.c (discover_flags_reg, replacement_quality,
	copy_src_to_dest, reg_is_remote_constant_p, regmove_optimize,
	fixup_match_1): Likewise.
	* regrename.c (note_sets, clear_dead_regs, build_def_use, kill_value,
	kill_set_value, copyprop_hardreg_forward_1): Likewise.
	* reload.c (MATCHES, push_secondary_reload, find_reusable_reload,
	reload_inner_reg_of_subreg, can_reload_into, push_reload,
	combine_reloads, find_dummy_reload, hard_reg_set_here_p,
	operands_match_p, decompose, find_reloads, find_reloads_toplev,
	find_reloads_address, subst_indexed_address, find_reloads_address_1,
	find_reloads_subreg_address, find_replacement,
	refers_to_regno_for_reload_p, reg_overlap_mentioned_for_reload_p,
	refers_to_mem_for_reload_p, find_equiv_reg, regno_clobbered_p): Likewise.
	* reload1.c (replace_pseudos_in, reload, calculate_needs_all_insns,
	find_reg, delete_dead_insn, alter_reg, eliminate_regs,
	elimination_effects, eliminate_regs_in_insn, scan_paradoxical_subregs,
	forget_old_reloads_1, reload_reg_free_for_value_p, choose_reload_regs,
	emit_input_reload_insns, emit_output_reload_insns, do_input_reload,
	do_output_reload, emit_reload_insns, gen_reload,
	delete_address_reloads_1, inc_for_reload): Likewise.
	* reorg.c (update_reg_dead_notes, fix_reg_dead_note,
	update_reg_unused_notes, fill_slots_from_thread): Likewise.
	* resource.c (update_live_status, mark_referenced_resources,
	mark_set_resources, mark_target_live_regs): Likewise.
	* rtlanal.c (nonzero_address_p, get_jump_table_offset,
	global_reg_mentioned_p_1, reg_mentioned_p, reg_referenced_p,
	reg_set_p, set_noop_p, find_last_value, refers_to_regno_p,
	note_stores, dead_or_set_p, dead_or_set_regno_p, find_regno_note,
	find_reg_fusage, find_regno_fusage, replace_regs, regno_use_in,
	parms_set, find_first_parameter_load, keep_with_call_p,
	hoist_test_store, hoist_update_store, address_cost, nonzero_bits1,
	num_sign_bit_copies1): Likewise.
	* rtlhooks.c (gen_lowpart_general): Likewise.
	* sched-deps.c (deps_may_trap_p, sched_analyze_1, sched_analyze_insn,
	sched_analyze): Likewise.
	* sched-rgn.c (check_live_1, update_live_1, sets_likely_spilled_1):
	Likewise.
	* sdbout.c (sdbout_symbol, sdbout_parms, sdbout_reg_parms): Likewise.
	* simplify-rtx.c (simplify_replace_rtx, simplify_unary_operation,
	simplify_binary_operation, simplify_const_relational_operation,
	simplify_subreg): Likewise.
	* stmt.c (decl_conflicts_with_clobbers_p, expand_asm_operands,
	expand_end_stmt_expr, expand_return, expand_decl,
	expand_anon_union_decl): Likewise.
	* unroll.c (precondition_loop_p, calculate_giv_inc, copy_loop_body,
	find_splittable_regs, find_splittable_givs, find_common_reg_term,
	loop_iterations): Likewise.
	* var-tracking.c (variable_union, variable_part_different_p,
	variable_different_p, count_uses, add_uses, add_stores,
	compute_bb_dataflow, set_variable_part, delete_variable_part,
	emit_notes_in_bb, vt_get_decl_and_offset, vt_add_function_parameters):
	Likewise.
	* varasm.c (assemble_variable): Likewise.

From-SVN: r83195

1 files changed, 32 insertions, 32 deletions

diff --git a/gcc/expmed.c b/gcc/expmed.c
index bebdbe8..fb590cd 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -417,7 +417,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 		   subregs results in Severe Tire Damage.  */
 		abort ();
 	    }
-	  if (GET_CODE (op0) == REG)
+	  if (REG_P (op0))
 	    op0 = gen_rtx_SUBREG (fieldmode, op0, byte_offset);
 	  else
 	    op0 = adjust_address (op0, fieldmode, offset);
@@ -472,7 +472,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       int icode = movstrict_optab->handlers[fieldmode].insn_code;
 
       /* Get appropriate low part of the value being stored.  */
-      if (GET_CODE (value) == CONST_INT || GET_CODE (value) == REG)
+      if (GET_CODE (value) == CONST_INT || REG_P (value))
 	value = gen_lowpart (fieldmode, value);
       else if (!(GET_CODE (value) == SYMBOL_REF
 		 || GET_CODE (value) == LABEL_REF
@@ -558,7 +558,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       if (offset != 0
 	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
 	{
-	  if (GET_CODE (op0) != REG)
+	  if (!REG_P (op0))
 	    {
 	      /* Since this is a destination (lvalue), we can't copy it to a
 		 pseudo.  We can trivially remove a SUBREG that does not
@@ -597,7 +597,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       && !(bitsize == 1 && GET_CODE (value) == CONST_INT)
       /* Ensure insv's size is wide enough for this field.  */
       && (GET_MODE_BITSIZE (op_mode) >= bitsize)
-      && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+      && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG)
 	    && (bitsize + bitpos > GET_MODE_BITSIZE (op_mode))))
     {
       int xbitpos = bitpos;
@@ -666,7 +666,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	/* We can't just change the mode, because this might clobber op0,
 	   and we will need the original value of op0 if insv fails.  */
 	xop0 = gen_rtx_SUBREG (maxmode, SUBREG_REG (xop0), SUBREG_BYTE (xop0));
-      if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode)
+      if (REG_P (xop0) && GET_MODE (xop0) != maxmode)
 	xop0 = gen_rtx_SUBREG (maxmode, xop0, 0);
 
       /* On big-endian machines, we count bits from the most significant.
@@ -768,7 +768,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset,
      and a field split across two bytes.
      Such cases are not supposed to be able to occur.  */
 
-  if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+  if (REG_P (op0) || GET_CODE (op0) == SUBREG)
     {
       if (offset != 0)
 	abort ();
@@ -866,7 +866,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset,
 
       if (GET_MODE (value) != mode)
 	{
-	  if ((GET_CODE (value) == REG || GET_CODE (value) == SUBREG)
+	  if ((REG_P (value) || GET_CODE (value) == SUBREG)
 	      && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (value)))
 	    value = gen_lowpart (mode, value);
 	  else
@@ -885,7 +885,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset,
   /* Now clear the chosen bits in OP0,
      except that if VALUE is -1 we need not bother.  */
 
-  subtarget = (GET_CODE (op0) == REG || ! flag_force_mem) ? op0 : 0;
+  subtarget = (REG_P (op0) || ! flag_force_mem) ? op0 : 0;
 
   if (! all_one)
     {
@@ -924,7 +924,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
 
   /* Make sure UNIT isn't larger than BITS_PER_WORD, we can only handle that
      much at a time.  */
-  if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+  if (REG_P (op0) || GET_CODE (op0) == SUBREG)
     unit = BITS_PER_WORD;
   else
     unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD);
@@ -1013,7 +1013,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
 					GET_MODE (SUBREG_REG (op0)));
 	  offset = 0;
 	}
-      else if (GET_CODE (op0) == REG)
+      else if (REG_P (op0))
 	{
 	  word = operand_subword_force (op0, offset, GET_MODE (op0));
 	  offset = 0;
@@ -1088,7 +1088,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       op0 = SUBREG_REG (op0);
     }
 
-  if (GET_CODE (op0) == REG
+  if (REG_P (op0)
       && mode == GET_MODE (op0)
       && bitnum == 0
       && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
@@ -1239,7 +1239,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 		   subregs results in Severe Tire Damage.  */
 		goto no_subreg_mode_swap;
 	    }
-	  if (GET_CODE (op0) == REG)
+	  if (REG_P (op0))
 	    op0 = gen_rtx_SUBREG (mode1, op0, byte_offset);
 	  else
 	    op0 = adjust_address (op0, mode1, offset);
@@ -1262,7 +1262,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       unsigned int nwords = (bitsize + (BITS_PER_WORD - 1)) / BITS_PER_WORD;
       unsigned int i;
 
-      if (target == 0 || GET_CODE (target) != REG)
+      if (target == 0 || !REG_P (target))
 	target = gen_reg_rtx (mode);
 
       /* Indicate for flow that the entire target reg is being set.  */
@@ -1346,7 +1346,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       if (offset != 0
 	  || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
 	{
-	  if (GET_CODE (op0) != REG)
+	  if (!REG_P (op0))
 	    op0 = copy_to_reg (op0);
 	  op0 = gen_rtx_SUBREG (mode_for_size (BITS_PER_WORD, MODE_INT, 0),
 		                op0, (offset * UNITS_PER_WORD));
@@ -1362,7 +1362,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     {
       if (HAVE_extzv
 	  && (GET_MODE_BITSIZE (extzv_mode) >= bitsize)
-	  && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+	  && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG)
 		&& (bitsize + bitpos > GET_MODE_BITSIZE (extzv_mode))))
 	{
 	  unsigned HOST_WIDE_INT xbitpos = bitpos, xoffset = offset;
@@ -1430,7 +1430,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	     SImode). to make it acceptable to the format of extzv.  */
 	  if (GET_CODE (xop0) == SUBREG && GET_MODE (xop0) != maxmode)
 	    goto extzv_loses;
-	  if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode)
+	  if (REG_P (xop0) && GET_MODE (xop0) != maxmode)
 	    xop0 = gen_rtx_SUBREG (maxmode, xop0, 0);
 
 	  /* On big-endian machines, we count bits from the most significant.
@@ -1450,7 +1450,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
 	  if (GET_MODE (xtarget) != maxmode)
 	    {
-	      if (GET_CODE (xtarget) == REG)
+	      if (REG_P (xtarget))
 		{
 		  int wider = (GET_MODE_SIZE (maxmode)
 			       > GET_MODE_SIZE (GET_MODE (xtarget)));
@@ -1496,7 +1496,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     {
       if (HAVE_extv
 	  && (GET_MODE_BITSIZE (extv_mode) >= bitsize)
-	  && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+	  && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG)
 		&& (bitsize + bitpos > GET_MODE_BITSIZE (extv_mode))))
 	{
 	  int xbitpos = bitpos, xoffset = offset;
@@ -1558,7 +1558,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	     SImode) to make it acceptable to the format of extv.  */
 	  if (GET_CODE (xop0) == SUBREG && GET_MODE (xop0) != maxmode)
 	    goto extv_loses;
-	  if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode)
+	  if (REG_P (xop0) && GET_MODE (xop0) != maxmode)
 	    xop0 = gen_rtx_SUBREG (maxmode, xop0, 0);
 
 	  /* On big-endian machines, we count bits from the most significant.
@@ -1579,7 +1579,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
 	  if (GET_MODE (xtarget) != maxmode)
 	    {
-	      if (GET_CODE (xtarget) == REG)
+	      if (REG_P (xtarget))
 		{
 		  int wider = (GET_MODE_SIZE (maxmode)
 			       > GET_MODE_SIZE (GET_MODE (xtarget)));
@@ -1670,7 +1670,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
   unsigned int total_bits = BITS_PER_WORD;
   enum machine_mode mode;
 
-  if (GET_CODE (op0) == SUBREG || GET_CODE (op0) == REG)
+  if (GET_CODE (op0) == SUBREG || REG_P (op0))
     {
       /* Special treatment for a bit field split across two registers.  */
       if (bitsize + bitpos > BITS_PER_WORD)
@@ -1732,7 +1732,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
 	  tree amount = build_int_2 (bitpos, 0);
 	  /* Maybe propagate the target for the shift.  */
 	  /* But not if we will return it--could confuse integrate.c.  */
-	  rtx subtarget = (target != 0 && GET_CODE (target) == REG ? target : 0);
+	  rtx subtarget = (target != 0 && REG_P (target) ? target : 0);
 	  if (tmode != mode) subtarget = 0;
 	  op0 = expand_shift (RSHIFT_EXPR, mode, op0, amount, subtarget, 1);
 	}
@@ -1771,7 +1771,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
       tree amount
 	= build_int_2 (GET_MODE_BITSIZE (mode) - (bitsize + bitpos), 0);
       /* Maybe propagate the target for the shift.  */
-      rtx subtarget = (target != 0 && GET_CODE (target) == REG ? target : 0);
+      rtx subtarget = (target != 0 && REG_P (target) ? target : 0);
       op0 = expand_shift (LSHIFT_EXPR, mode, op0, amount, subtarget, 1);
     }
 
@@ -1868,7 +1868,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
 
   /* Make sure UNIT isn't larger than BITS_PER_WORD, we can only handle that
      much at a time.  */
-  if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG)
+  if (REG_P (op0) || GET_CODE (op0) == SUBREG)
     unit = BITS_PER_WORD;
   else
     unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD);
@@ -1902,7 +1902,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
 					GET_MODE (SUBREG_REG (op0)));
 	  offset = 0;
 	}
-      else if (GET_CODE (op0) == REG)
+      else if (REG_P (op0))
 	{
 	  word = operand_subword_force (op0, offset, GET_MODE (op0));
 	  offset = 0;
@@ -3709,13 +3709,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	if (rem_flag)
 	  {
 	    remainder
-	      = GET_CODE (target) == REG ? target : gen_reg_rtx (compute_mode);
+	      = REG_P (target) ? target : gen_reg_rtx (compute_mode);
 	    quotient = gen_reg_rtx (compute_mode);
 	  }
 	else
 	  {
 	    quotient
-	      = GET_CODE (target) == REG ? target : gen_reg_rtx (compute_mode);
+	      = REG_P (target) ? target : gen_reg_rtx (compute_mode);
 	    remainder = gen_reg_rtx (compute_mode);
 	  }
 
@@ -3825,13 +3825,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 
 	    if (rem_flag)
 	      {
-		remainder = (GET_CODE (target) == REG
+		remainder = (REG_P (target)
 			     ? target : gen_reg_rtx (compute_mode));
 		quotient = gen_reg_rtx (compute_mode);
 	      }
 	    else
 	      {
-		quotient = (GET_CODE (target) == REG
+		quotient = (REG_P (target)
 			    ? target : gen_reg_rtx (compute_mode));
 		remainder = gen_reg_rtx (compute_mode);
 	      }
@@ -3922,13 +3922,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	      target = gen_reg_rtx (compute_mode);
 	    if (rem_flag)
 	      {
-		remainder= (GET_CODE (target) == REG
+		remainder= (REG_P (target)
 			    ? target : gen_reg_rtx (compute_mode));
 		quotient = gen_reg_rtx (compute_mode);
 	      }
 	    else
 	      {
-		quotient = (GET_CODE (target) == REG
+		quotient = (REG_P (target)
 			    ? target : gen_reg_rtx (compute_mode));
 		remainder = gen_reg_rtx (compute_mode);
 	      }
@@ -4884,7 +4884,7 @@ emit_store_flag_force (rtx target, enum rtx_code code, rtx op0, rtx op1,
 
   /* If this failed, we have to do this with set/compare/jump/set code.  */
 
-  if (GET_CODE (target) != REG
+  if (!REG_P (target)
       || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
     target = gen_reg_rtx (GET_MODE (target));