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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-12-20 12:54:01 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-12-20 12:54:01 +0000 |
commit | 8c59e5e735fcc19f170b4b7d72b55400da99e7b4 (patch) | |
tree | 970495d1af2f273a8cc5044cb312cb2cd6f24fa2 /gcc/expmed.c | |
parent | fc60a41612bad379060969b6ed3a78eb160aae8a (diff) | |
download | gcc-8c59e5e735fcc19f170b4b7d72b55400da99e7b4.zip gcc-8c59e5e735fcc19f170b4b7d72b55400da99e7b4.tar.gz gcc-8c59e5e735fcc19f170b4b7d72b55400da99e7b4.tar.bz2 |
poly_int: C++ bitfield regions
This patch changes C++ bitregion_start/end values from constants to
poly_ints. Although it's unlikely that the size needs to be polynomial
in practice, the offset could be with future language extensions.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.h (store_bit_field): Change bitregion_start and
bitregion_end from unsigned HOST_WIDE_INT to poly_uint64.
* expmed.c (adjust_bit_field_mem_for_reg, strict_volatile_bitfield_p)
(store_bit_field_1, store_integral_bit_field, store_bit_field)
(store_fixed_bit_field, store_split_bit_field): Likewise.
* expr.c (store_constructor_field, store_field): Likewise.
(optimize_bitfield_assignment_op): Likewise. Make the same change
to bitsize and bitpos.
* machmode.h (bit_field_mode_iterator): Change m_bitregion_start
and m_bitregion_end from HOST_WIDE_INT to poly_int64. Make the
same change in the constructor arguments.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
* stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator):
Change bitregion_start and bitregion_end from HOST_WIDE_INT to
poly_int64.
(bit_field_mode_iterator::next_mode): Update for new types
of m_bitregion_start and m_bitregion_end.
(get_best_mode): Change bitregion_start and bitregion_end from
unsigned HOST_WIDE_INT to poly_uint64.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255879
Diffstat (limited to 'gcc/expmed.c')
-rw-r--r-- | gcc/expmed.c | 51 |
1 files changed, 21 insertions, 30 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c index 3b75be4..3a6a9ba 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -50,14 +50,12 @@ struct target_expmed *this_target_expmed = &default_target_expmed; static bool store_integral_bit_field (rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, + poly_uint64, poly_uint64, machine_mode, rtx, bool, bool); static void store_fixed_bit_field (rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, + poly_uint64, poly_uint64, rtx, scalar_int_mode, bool); static void store_fixed_bit_field_1 (rtx, scalar_int_mode, unsigned HOST_WIDE_INT, @@ -66,8 +64,7 @@ static void store_fixed_bit_field_1 (rtx, scalar_int_mode, static void store_split_bit_field (rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, + poly_uint64, poly_uint64, rtx, scalar_int_mode, bool); static rtx extract_integral_bit_field (rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, @@ -472,8 +469,8 @@ static rtx adjust_bit_field_mem_for_reg (enum extraction_pattern pattern, rtx op0, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitnum, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, + poly_uint64 bitregion_end, machine_mode fieldmode, unsigned HOST_WIDE_INT *new_bitnum) { @@ -537,8 +534,8 @@ static bool strict_volatile_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitnum, scalar_int_mode fieldmode, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end) + poly_uint64 bitregion_start, + poly_uint64 bitregion_end) { unsigned HOST_WIDE_INT modesize = GET_MODE_BITSIZE (fieldmode); @@ -565,9 +562,10 @@ strict_volatile_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize, return false; /* Check for cases where the C++ memory model applies. */ - if (bitregion_end != 0 - && (bitnum - bitnum % modesize < bitregion_start - || bitnum - bitnum % modesize + modesize - 1 > bitregion_end)) + if (maybe_ne (bitregion_end, 0U) + && (maybe_lt (bitnum - bitnum % modesize, bitregion_start) + || maybe_gt (bitnum - bitnum % modesize + modesize - 1, + bitregion_end))) return false; return true; @@ -731,8 +729,7 @@ store_bit_field_using_insv (const extraction_insn *insv, rtx op0, static bool store_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, poly_uint64 bitregion_end, machine_mode fieldmode, rtx value, bool reverse, bool fallback_p) { @@ -859,8 +856,8 @@ static bool store_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitnum, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, + poly_uint64 bitregion_end, machine_mode fieldmode, rtx value, bool reverse, bool fallback_p) { @@ -1086,8 +1083,7 @@ store_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode, void store_bit_field (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, poly_uint64 bitregion_end, machine_mode fieldmode, rtx value, bool reverse) { @@ -1134,15 +1130,12 @@ store_bit_field (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, /* Under the C++0x memory model, we must not touch bits outside the bit region. Adjust the address to start at the beginning of the bit region. */ - if (MEM_P (str_rtx) && bitregion_start > 0) + if (MEM_P (str_rtx) && maybe_ne (bitregion_start, 0U)) { scalar_int_mode best_mode; machine_mode addr_mode = VOIDmode; - HOST_WIDE_INT offset; - - gcc_assert ((bitregion_start % BITS_PER_UNIT) == 0); - offset = bitregion_start / BITS_PER_UNIT; + poly_uint64 offset = exact_div (bitregion_start, BITS_PER_UNIT); bitnum -= bitregion_start; poly_int64 size = bits_to_bytes_round_up (bitnum + bitsize); bitregion_end -= bitregion_start; @@ -1175,8 +1168,7 @@ static void store_fixed_bit_field (rtx op0, opt_scalar_int_mode op0_mode, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitnum, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, poly_uint64 bitregion_end, rtx value, scalar_int_mode value_mode, bool reverse) { /* There is a case not handled here: @@ -1331,8 +1323,7 @@ static void store_split_bit_field (rtx op0, opt_scalar_int_mode op0_mode, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitpos, - unsigned HOST_WIDE_INT bitregion_start, - unsigned HOST_WIDE_INT bitregion_end, + poly_uint64 bitregion_start, poly_uint64 bitregion_end, rtx value, scalar_int_mode value_mode, bool reverse) { unsigned int unit, total_bits, bitsdone = 0; @@ -1380,9 +1371,9 @@ store_split_bit_field (rtx op0, opt_scalar_int_mode op0_mode, UNIT close to the end of the region as needed. If op0 is a REG or SUBREG of REG, don't do this, as there can't be data races on a register and we can expand shorter code in some cases. */ - if (bitregion_end + if (maybe_ne (bitregion_end, 0U) && unit > BITS_PER_UNIT - && bitpos + bitsdone - thispos + unit > bitregion_end + 1 + && maybe_gt (bitpos + bitsdone - thispos + unit, bitregion_end + 1) && !REG_P (op0) && (GET_CODE (op0) != SUBREG || !REG_P (SUBREG_REG (op0)))) { |