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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-08-30 11:10:53 +0000 |
---|---|---|
committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-08-30 11:10:53 +0000 |
commit | b4206259f10455603e0c90825566de1ea777c04a (patch) | |
tree | 7511466ff26d775b7a754d24ae68485928d10a95 /gcc/expmed.c | |
parent | f67f4dfffe08b1cea5de407e35e03dd38b64fcd3 (diff) | |
download | gcc-b4206259f10455603e0c90825566de1ea777c04a.zip gcc-b4206259f10455603e0c90825566de1ea777c04a.tar.gz gcc-b4206259f10455603e0c90825566de1ea777c04a.tar.bz2 |
[20/77] Replace MODE_INT checks with is_int_mode
Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (is_int_mode): New fuction.
* combine.c (find_split_point): Use it.
(combine_simplify_rtx): Likewise.
(simplify_if_then_else): Likewise.
(simplify_set): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Likewise.
* cse.c (notreg_cost): Likewise.
(cse_insn): Likewise.
* cselib.c (cselib_lookup_1): Likewise.
* dojump.c (do_jump_1): Likewise.
(do_compare_rtx_and_jump): Likewise.
* dse.c (get_call_args): Likewise.
* dwarf2out.c (rtl_for_decl_init): Likewise.
(native_encode_initializer): Likewise.
* expmed.c (emit_store_flag_1): Likewise.
(emit_store_flag): Likewise.
* expr.c (convert_modes): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* fold-const.c (fold_read_from_constant_string): Likewise.
* gimple-ssa-sprintf.c (get_format_string): Likewise.
* optabs-libfuncs.c (gen_int_libfunc): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_unop): Likewise.
(expand_abs_nojump): Likewise.
(expand_one_cmpl_abs_nojump): Likewise.
* simplify-rtx.c (mode_signbit_p): Likewise.
(val_signbit_p): Likewise.
(val_signbit_known_set_p): Likewise.
(val_signbit_known_clear_p): Likewise.
(simplify_relational_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251472
Diffstat (limited to 'gcc/expmed.c')
-rw-r--r-- | gcc/expmed.c | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c index f7ac821..815c766 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -5446,8 +5446,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, /* If we are comparing a double-word integer with zero or -1, we can convert the comparison into one involving a single word. */ - if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD * 2 - && GET_MODE_CLASS (mode) == MODE_INT + scalar_int_mode int_mode; + if (is_int_mode (mode, &int_mode) + && GET_MODE_BITSIZE (int_mode) == BITS_PER_WORD * 2 && (!MEM_P (op0) || ! MEM_VOLATILE_P (op0))) { rtx tem; @@ -5458,8 +5459,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, /* Do a logical OR or AND of the two words and compare the result. */ - op00 = simplify_gen_subreg (word_mode, op0, mode, 0); - op01 = simplify_gen_subreg (word_mode, op0, mode, UNITS_PER_WORD); + op00 = simplify_gen_subreg (word_mode, op0, int_mode, 0); + op01 = simplify_gen_subreg (word_mode, op0, int_mode, UNITS_PER_WORD); tem = expand_binop (word_mode, op1 == const0_rtx ? ior_optab : and_optab, op00, op01, NULL_RTX, unsignedp, @@ -5474,9 +5475,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, rtx op0h; /* If testing the sign bit, can just test on high word. */ - op0h = simplify_gen_subreg (word_mode, op0, mode, + op0h = simplify_gen_subreg (word_mode, op0, int_mode, subreg_highpart_offset (word_mode, - mode)); + int_mode)); tem = emit_store_flag (NULL_RTX, code, op0h, op1, word_mode, unsignedp, normalizep); } @@ -5501,21 +5502,21 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, /* If this is A < 0 or A >= 0, we can do this by taking the ones complement of A (for GE) and shifting the sign bit to the low bit. */ if (op1 == const0_rtx && (code == LT || code == GE) - && GET_MODE_CLASS (mode) == MODE_INT + && is_int_mode (mode, &int_mode) && (normalizep || STORE_FLAG_VALUE == 1 - || val_signbit_p (mode, STORE_FLAG_VALUE))) + || val_signbit_p (int_mode, STORE_FLAG_VALUE))) { subtarget = target; if (!target) - target_mode = mode; + target_mode = int_mode; /* If the result is to be wider than OP0, it is best to convert it first. If it is to be narrower, it is *incorrect* to convert it first. */ - else if (GET_MODE_SIZE (target_mode) > GET_MODE_SIZE (mode)) + else if (GET_MODE_SIZE (target_mode) > GET_MODE_SIZE (int_mode)) { - op0 = convert_modes (target_mode, mode, op0, 0); + op0 = convert_modes (target_mode, int_mode, op0, 0); mode = target_mode; } @@ -5925,8 +5926,9 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, /* The remaining tricks only apply to integer comparisons. */ - if (GET_MODE_CLASS (mode) == MODE_INT) - return emit_store_flag_int (target, subtarget, code, op0, op1, mode, + scalar_int_mode int_mode; + if (is_int_mode (mode, &int_mode)) + return emit_store_flag_int (target, subtarget, code, op0, op1, int_mode, unsignedp, normalizep, trueval); return 0; |