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authorJakub Jelinek <jakub@redhat.com>2017-03-31 08:38:35 +0200
committerJakub Jelinek <jakub@gcc.gnu.org>2017-03-31 08:38:35 +0200
commit7d790165457c7c6912ed98da4a64d9b020c6f483 (patch)
treea2de62c5d9b9d71a0b6cd2125e29b6575d8fc3d4 /gcc/expmed.c
parenta7d551541989a53c964d5cc54359069bf4cf919a (diff)
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re PR middle-end/80173 (ICE in store_bit_field_1, at expmed.c:787)
PR middle-end/80173 * expmed.c (store_bit_field_1): Don't attempt to create a word subreg out of hard registers wider than word if they have HARD_REGNO_NREGS of 1 for their mode. * gcc.target/i386/pr80173.c: New test. From-SVN: r246608
Diffstat (limited to 'gcc/expmed.c')
-rw-r--r--gcc/expmed.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c
index bcc5922..c0260c5 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -965,8 +965,14 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
}
/* If OP0 is a multi-word register, narrow it to the affected word.
- If the region spans two words, defer to store_split_bit_field. */
- if (!MEM_P (op0) && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
+ If the region spans two words, defer to store_split_bit_field.
+ Don't do this if op0 is a single hard register wider than word
+ such as a float or vector register. */
+ if (!MEM_P (op0)
+ && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD
+ && (!REG_P (op0)
+ || !HARD_REGISTER_P (op0)
+ || HARD_REGNO_NREGS (REGNO (op0), GET_MODE (op0)) != 1))
{
if (bitnum % BITS_PER_WORD + bitsize > BITS_PER_WORD)
{