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authorPan Li <pan2.li@intel.com>2024-09-24 10:22:07 +0800
committerPan Li <pan2.li@intel.com>2024-11-12 22:38:34 +0800
commit9a64cd192548bcb29194dd8bd6340dfc2168ae7d (patch)
tree6910175be4d1ad41f90c1351dedc51abd06b5c13 /gcc/errors.h
parent4bee5252c1dedad044300ff89731ac26e27c9b21 (diff)
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RISC-V: Fix incorrect test macro for signed scalar SAT_ADD form 2 run test
This patch would like to fix one incorrect test macro usage for form 2 of signed scalar SAT_ADD run test. It should leverage the _FMT_2 instead of _FMT_1 for form 2. The below test are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add test helper macro. * gcc.target/riscv/sat_s_add-run-5.c: Take form 2 for run test. * gcc.target/riscv/sat_s_add-run-6.c: Ditto. * gcc.target/riscv/sat_s_add-run-7.c: Ditto. * gcc.target/riscv/sat_s_add-run-8.c: Ditto. Signed-off-by: Pan Li <pan2.li@intel.com>
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