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| author | Georg-Johann Lay <avr@gjlay.de> | 2025-06-14 19:57:18 +0200 |
|---|---|---|
| committer | Georg-Johann Lay <avr@gjlay.de> | 2025-06-14 19:59:03 +0200 |
| commit | 61789b5abec3079d02ee9eaa7468015ab1f6f701 (patch) | |
| tree | 27d4bc549f45d2dfb0a24d134525ab5f1090ab80 /gcc/dwarf2ctf.cc | |
| parent | 6923d412e61f447e423f2765b17500cc01a83c30 (diff) | |
| download | gcc-61789b5abec3079d02ee9eaa7468015ab1f6f701.zip gcc-61789b5abec3079d02ee9eaa7468015ab1f6f701.tar.gz gcc-61789b5abec3079d02ee9eaa7468015ab1f6f701.tar.bz2 | |
AVR: Fix PR120423 / PR116389.
The problem with PR120423 and PR116389 is that reload might assign an invalid
hard register to a paradoxical subreg. For example with the test case from
the PR, it assigns (REG:QI 31) to the inner of (subreg:HI (QI) 0) which is
valid, but the subreg will be turned into (REG:HI 31) which is invalid
and triggers an ICE in postreload.
The problem only occurs with the old reload pass.
The patch maps the paradoxical subregs to a zero-extends which will be
allocated correctly. For the 120423 testcases, the code is the same like
with -mlra (which doesn't implement the fix), so the patch doesn't even
introduce a performance penalty.
The patch is only needed for v15: v14 is not affected, and in v16 reload
will be removed.
PR rtl-optimization/120423
PR rtl-optimization/116389
gcc/
* config/avr/avr.md [-mno-lra]: Add pre-reload split to transform
(left shift of) a paradoxical subreg to a (left shift of) zero-extend.
gcc/testsuite/
* gcc.target/avr/torture/pr120423-1.c: New test.
* gcc.target/avr/torture/pr120423-2.c: New test.
* gcc.target/avr/torture/pr120423-116389.c: New test.
Diffstat (limited to 'gcc/dwarf2ctf.cc')
0 files changed, 0 insertions, 0 deletions