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| author | Richard Earnshaw <rearnsha@arm.com> | 2024-03-05 17:21:43 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2024-03-05 17:21:43 +0000 |
| commit | 067a012bde15bfb62d9af309d9d524ebfe91b705 (patch) | |
| tree | 5a45c827beffdccc1331ebd0d01b4cf54c1eeed7 /gcc/dwarf2ctf.cc | |
| parent | 2ba3171f161452df476485272cc966bc523d9859 (diff) | |
| download | gcc-067a012bde15bfb62d9af309d9d524ebfe91b705.zip gcc-067a012bde15bfb62d9af309d9d524ebfe91b705.tar.gz gcc-067a012bde15bfb62d9af309d9d524ebfe91b705.tar.bz2 | |
arm: check for low register before applying peephole [PR113510]
For thumb1, when using a peephole to fuse
mov reg, #const
add reg, reg, SP
into
add reg, SP, #const
we must first check that reg is a low register, otherwise we will ICE
when trying to recognize the resulting insn.
gcc/ChangeLog:
PR target/113510
* config/arm/thumb1.md (peephole2 to fuse mov imm/add SP): Use
low_register_operand.
Diffstat (limited to 'gcc/dwarf2ctf.cc')
0 files changed, 0 insertions, 0 deletions