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authorXi Ruoyao <xry111@xry111.site>2024-07-28 19:57:02 +0800
committerXi Ruoyao <xry111@xry111.site>2024-07-31 17:43:10 +0800
commit996c2e2144c4a534b65424170c596dcbf44ba6db (patch)
tree1000951b2825a766667a70a330c8e097da957588 /gcc/dwarf2codeview.cc
parent70a4e79dc9ed73b056aa0362f61302e04227049f (diff)
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LoongArch: Rework bswap{hi,si,di}2 definition
Per a gcc-help thread we are generating sub-optimal code for __builtin_bswap{32,64}. To fix it: - Use a single revb.d instruction for bswapdi2. - Use a single revb.2w instruction for bswapsi2 for TARGET_64BIT, revb.2h + rotri.w for !TARGET_64BIT. - Use a single revb.2h instruction for bswapsi2 (x) r>> 16, and a single revb.2w instruction for bswapdi2 (x) r>> 32. Unfortunately I cannot figure out a way to make the compiler generate revb.4h or revh.{2w,d} instructions. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_REVB_2H, UNSPEC_REVB_4H, UNSPEC_REVH_D): Remove UNSPECs. (revb_4h, revh_d): Remove define_insn. (revb_2h): Define as (rotatert:SI (bswap:SI x) 16) instead of an UNSPEC. (revb_2h_extend, revb_2w, *bswapsi2, bswapdi2): New define_insn. (bswapsi2): Change to define_expand. Only expand to revb.2h + rotri.w if !TARGET_64BIT. (bswapdi2): Change to define_insn of which the output is just a revb.d instruction. gcc/testsuite/ChangeLog: * gcc.target/loongarch/revb.c: New test.
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