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authorDavid Malcolm <dmalcolm@redhat.com>2014-08-27 19:34:13 +0000
committerDavid Malcolm <dmalcolm@gcc.gnu.org>2014-08-27 19:34:13 +0000
commitac44248e6abd1bfc0ed92a9ef66fbf4987cdea96 (patch)
treed5aca9a61ea42adcfa888f33107d59b9b198ce9e /gcc/doc
parentaf48075062e32c2fd7816af4096d97459c5e5fc2 (diff)
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Use rtx_insn for various target.def hooks
gcc/ 2014-08-27 David Malcolm <dmalcolm@redhat.com> * target.def (unwind_emit): Strengthen param "insn" from rtx to rtx_insn *. (final_postscan_insn): Likewise. (adjust_cost): Likewise. (adjust_priority): Likewise. (variable_issue): Likewise. (macro_fusion_pair_p): Likewise. (dfa_post_cycle_insn): Likewise. (first_cycle_multipass_dfa_lookahead_guard): Likewise. (first_cycle_multipass_issue): Likewise. (dfa_new_cycle): Likewise. (adjust_cost_2): Likewise for params "insn" and "dep_insn". (speculate_insn): Likewise for param "insn". (gen_spec_check): Likewise for params "insn" and "label". (get_insn_spec_ds): Likewise for param "insn". (get_insn_checked_ds): Likewise. (dispatch_do): Likewise. (dispatch): Likewise. (cannot_copy_insn_p): Likewise. (invalid_within_doloop): Likewise. (legitimate_combined_insn): Likewise. (needed): Likewise. (after): Likewise. * doc/tm.texi: Automatically updated to reflect changes to target.def. * haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when working with insn. (schedule_block): Likewise. (sched_init): Likewise. (sched_speculate_insn): Strengthen param "insn" from rtx to rtx_insn *. (ready_remove_first_dispatch): Convert NULL_RTX to NULL when working with insn. * hooks.c (hook_bool_rtx_true): Rename to... hook_bool_rtx_insn_true): ...this, and strengthen first param from rtx to rtx_insn *. (hook_constcharptr_const_rtx_null): Rename to... (hook_constcharptr_const_rtx_insn_null): ...this, and strengthen first param from const_rtx to const rtx_insn *. (hook_bool_rtx_int_false): Rename to... (hook_bool_rtx_insn_int_false): ...this, and strengthen first param from rtx to rtx_insn *. (hook_void_rtx_int): Rename to... (hook_void_rtx_insn_int): ...this, and strengthen first param from rtx to rtx_insn *. * hooks.h (hook_bool_rtx_true): Rename to... (hook_bool_rtx_insn_true): ...this, and strengthen first param from rtx to rtx_insn *. (hook_bool_rtx_int_false): Rename to... (hook_bool_rtx_insn_int_false): ...this, and strengthen first param from rtx to rtx_insn *. (hook_void_rtx_int): Rename to... (hook_void_rtx_insn_int): ...this, and strengthen first param from rtx to rtx_insn *. (hook_constcharptr_const_rtx_null): Rename to... (hook_constcharptr_const_rtx_insn_null): ...this, and strengthen first param from const_rtx to const rtx_insn *. * sched-deps.c (sched_macro_fuse_insns): Strengthen param "insn" and local "prev" from rtx to rtx_insn *. * sched-int.h (sched_speculate_insn): Strengthen first param from rtx to rtx_insn *. * sel-sched.c (create_speculation_check): Likewise for local "label". * targhooks.c (default_invalid_within_doloop): Strengthen param "insn" from const_rtx to const rtx_insn *. * targhooks.h (default_invalid_within_doloop): Strengthen param from const_rtx to const rtx_insn *. * config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise. (alpha_adjust_cost): Likewise for params "insn", "dep_insn". * config/arc/arc.c (arc_sched_adjust_priority): Likewise for param "insn". (arc_invalid_within_doloop): Likewise, with const. * config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep". (arm_cannot_copy_insn_p): Likewise for param "insn". (arm_unwind_emit): Likewise. * config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn", "dep_insn". * config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn". (c6x_variable_issue): Likewise. Removed now-redundant checked cast. (c6x_adjust_cost): Likewise for params "insn", "dep_insn". * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Likewise for param "insn". (epiphany_mode_after): Likewise. * config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for params "insn", "dep_insn". (epiphany_mode_needed): Likewise for param "insn". (epiphany_mode_after): Likewise. * config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise. * config/i386/i386.c (ix86_legitimate_combined_insn): Likewise. (ix86_avx_u128_mode_needed): Likewise. (ix86_i387_mode_needed): Likewise. (ix86_mode_needed): Likewise. (ix86_avx_u128_mode_after): Likewise. (ix86_mode_after): Likewise. (ix86_adjust_cost): Likewise for params "insn", "dep_insn". (ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp". (ix86_adjust_priority): Likewise for param "insn". (core2i7_first_cycle_multipass_issue): Likewise for param "insn". (do_dispatch): Likewise. (has_dispatch): Likewise. * config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise. * config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of default hook implementation from hook_constcharptr_const_rtx_null to hook_constcharptr_const_rtx_insn_null. (ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from rtx to rtx_insn *. (ia64_variable_issue): Likewise for param "insn". (ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise. (ia64_dfa_new_cycle): Likewise. (ia64_get_insn_spec_ds): Likewise. (ia64_get_insn_checked_ds): Likewise. (ia64_speculate_insn): Likewise. (ia64_gen_spec_check): Likewise for params "insn", "label". (ia64_asm_unwind_emit): Likewise for param "insn". * config/m32r/m32r.c (m32r_adjust_priority): Likewise. * config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params "insn", "def_insn". (m68k_sched_variable_issue): Likewise for param "insn". * config/mep/mep.c (mep_adjust_cost): Likewise for params "insn", "def_insn". * config/microblaze/microblaze.c (microblaze_adjust_cost): Likewise for params "insn", "dep". * config/mips/mips.c (mips_adjust_cost): Likewise. (mips_variable_issue): Likewise for param "insn". (mips_final_postscan_insn): Likewise. * config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise for params "insn", "dep". * config/pa/pa.c (pa_adjust_cost): Likewise for params "insn", "dep_insn". (pa_adjust_priority): Likewise for param "insn". * config/picochip/picochip.c (picochip_sched_adjust_cost): Likewise for params "insn", "dep_insn". * config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for param "insn". (rs6000_variable_issue): Likewise. (rs6000_adjust_cost): Likewise for params "insn", "dep_insn". (rs6000_debug_adjust_cost): Likewise. (rs6000_adjust_priority): Likewise for param "insn". (rs6000_use_sched_lookahead_guard): Likewise. (get_next_active_insn): Likewise for return type and both params. (redefine_groups): Likewise for params "prev_head_insn", "tail" and locals "insn", "next_insn". (pad_groups): Likewise. * config/s390/s390.c (s390_adjust_priority): Likewise for param "insn". (s390_cannot_copy_insn_p): Likewise. (s390_sched_variable_issue): Likewise for third param, eliminating checked cast. (TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of default hook implementation from hook_constcharptr_const_rtx_null to hook_constcharptr_const_rtx_insn_null. * config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn" from rtx to rtx_insn *. (sh_adjust_cost): Likewise for params "insn", "dep_insn". (sh_variable_issue): Likewise for param "insn". (sh_dfa_new_cycle): Likewise. (sh_mode_needed): Likewise. (sh_mode_after): Likewise. * config/sparc/sparc.c (supersparc_adjust_cost): Likewise for params "insn", "dep_insn". (hypersparc_adjust_cost): Likewise. (sparc_adjust_cost): Likewise. * config/spu/spu.c (spu_sched_variable_issue): Likewise for third param, eliminated checked cast. (spu_sched_adjust_cost): Likewise for first and third params. * config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen params "insn" and "dep_insn" from rtx to rtx_insn *. * config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise. From-SVN: r214584
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/tm.texi36
1 files changed, 18 insertions, 18 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 4e0bab3..0c44d51 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6378,7 +6378,7 @@ it to vary depending on what the instructions are, you must use
@samp{TARGET_SCHED_VARIABLE_ISSUE}.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx @var{insn}, int @var{more})
+@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx_insn *@var{insn}, int @var{more})
This hook is executed by the scheduler after it has scheduled an insn
from the ready list. It should return the number of insns which can
still be issued in the current cycle. The default is
@@ -6392,7 +6392,7 @@ debug output to. @var{verbose} is the verbose level provided by
was scheduled.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx @var{insn}, rtx @var{link}, rtx @var{dep_insn}, int @var{cost})
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx_insn *@var{insn}, rtx @var{link}, rtx_insn *@var{dep_insn}, int @var{cost})
This function corrects the value of @var{cost} based on the
relationship between @var{insn} and @var{dep_insn} through the
dependence @var{link}. It should return the new value. The default
@@ -6407,7 +6407,7 @@ acceptable, you could use the hook to modify them too. See also
@pxref{Processor pipeline description}.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx @var{insn}, int @var{priority})
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx_insn *@var{insn}, int @var{priority})
This hook adjusts the integer scheduling priority @var{priority} of
@var{insn}. It should return the new priority. Increase the priority to
execute @var{insn} earlier, reduce the priority to execute @var{insn}
@@ -6447,7 +6447,7 @@ cycle. These other insns can then be taken into account properly.
This hook is used to check whether target platform supports macro fusion.
@end deftypefn
-@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx @var{condgen}, rtx @var{condjmp})
+@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx_insn *@var{condgen}, rtx_insn *@var{condjmp})
This hook is used to check whether two insns could be macro fused for
target microarchitecture. If this hook returns true for the given insn pair
(@var{condgen} and @var{condjmp}), scheduler will put them into a sched
@@ -6510,7 +6510,7 @@ when the new simulated processor cycle starts.
The hook can be used to initialize data used by the previous hook.
@end deftypefn
-@deftypefn {Target Hook} rtx TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
+@deftypefn {Target Hook} {rtx_insn *} TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
to changed the state as if the insn were scheduled when the new
simulated processor cycle finishes.
@@ -6564,7 +6564,7 @@ schedules to choose the best one.
The default is no multipass scheduling.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx @var{insn}, int @var{ready_index})
+@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx_insn *@var{insn}, int @var{ready_index})
This hook controls what insns from the ready insn queue will be
considered for the multipass insn scheduling. If the hook returns
@@ -6585,7 +6585,7 @@ This hook prepares the target backend for a new round of multipass
scheduling.
@end deftypefn
-@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *@var{data}, signed char *@var{ready_try}, int @var{n_ready}, rtx @var{insn}, const void *@var{prev_data})
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *@var{data}, signed char *@var{ready_try}, int @var{n_ready}, rtx_insn *@var{insn}, const void *@var{prev_data})
This hook is called when multipass scheduling evaluates instruction INSN.
@end deftypefn
@@ -6607,7 +6607,7 @@ This hook initializes target-specific data used in multipass scheduling.
This hook finalizes target-specific data used in multipass scheduling.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *@var{dump}, int @var{verbose}, rtx @var{insn}, int @var{last_clock}, int @var{clock}, int *@var{sort_p})
+@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *@var{dump}, int @var{verbose}, rtx_insn *@var{insn}, int @var{last_clock}, int @var{clock}, int *@var{sort_p})
This hook is called by the insn scheduler before issuing @var{insn}
on cycle @var{clock}. If the hook returns nonzero,
@var{insn} is not issued on this processor cycle. Instead,
@@ -6669,7 +6669,7 @@ Deallocate internal data in target scheduling context pointed to by @var{tc}.
Deallocate a store for target scheduling context pointed to by @var{tc}.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_SCHED_SPECULATE_INSN (rtx @var{insn}, unsigned int @var{dep_status}, rtx *@var{new_pat})
+@deftypefn {Target Hook} int TARGET_SCHED_SPECULATE_INSN (rtx_insn *@var{insn}, unsigned int @var{dep_status}, rtx *@var{new_pat})
This hook is called by the insn scheduler when @var{insn} has only
speculative dependencies and therefore can be scheduled speculatively.
The hook is used to check if the pattern of @var{insn} has a speculative
@@ -6686,7 +6686,7 @@ for @var{insn}. It should return @code{true}, if the corresponding check
instruction should branch to recovery code, or @code{false} otherwise.
@end deftypefn
-@deftypefn {Target Hook} rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx @var{insn}, rtx @var{label}, unsigned int @var{ds})
+@deftypefn {Target Hook} rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx_insn *@var{insn}, rtx_insn *@var{label}, unsigned int @var{ds})
This hook is called by the insn scheduler to generate a pattern for recovery
check instruction. If @var{mutate_p} is zero, then @var{insn} is a
speculative instruction for which the check should be generated.
@@ -6713,12 +6713,12 @@ bound will be used in case this hook is not implemented: the total number
of instructions divided by the issue rate.
@end deftypefn
-@deftypefn {Target Hook} bool TARGET_SCHED_DISPATCH (rtx @var{insn}, int @var{x})
+@deftypefn {Target Hook} bool TARGET_SCHED_DISPATCH (rtx_insn *@var{insn}, int @var{x})
This hook is called by Haifa Scheduler. It returns true if dispatch scheduling
is supported in hardware and the condition specified in the parameter is true.
@end deftypefn
-@deftypefn {Target Hook} void TARGET_SCHED_DISPATCH_DO (rtx @var{insn}, int @var{x})
+@deftypefn {Target Hook} void TARGET_SCHED_DISPATCH_DO (rtx_insn *@var{insn}, int @var{x})
This hook is called by Haifa Scheduler. It performs the operation specified
in its second parameter.
@end deftypefn
@@ -8498,7 +8498,7 @@ writing conditional output routines in those patterns.
If this macro is not defined, it is equivalent to a null statement.
@end defmac
-@deftypefn {Target Hook} void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *@var{file}, rtx @var{insn}, rtx *@var{opvec}, int @var{noperands})
+@deftypefn {Target Hook} void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *@var{file}, rtx_insn *@var{insn}, rtx *@var{opvec}, int @var{noperands})
If defined, this target hook is a function which is executed just after the
output of assembler code for @var{insn}, to change the mode of the assembler
if necessary.
@@ -8742,7 +8742,7 @@ The default is that no label is emitted.
If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be used to emit a directive to install a personality hook into the unwind info. This hook should not be used if dwarf2 unwind info is used.
@end deftypefn
-@deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx @var{insn})
+@deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx_insn *@var{insn})
This target hook emits assembly directives required to unwind the
given instruction. This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}
returns @code{UI_TARGET}.
@@ -9589,11 +9589,11 @@ switch is needed / supplied.
Generate one or more insns to set @var{entity} to @var{mode}. @var{hard_reg_live} is the set of hard registers live at the point where the insn(s) are to be inserted. @var{prev_moxde} indicates the mode to switch from. Sets of a lower numbered entity will be emitted before sets of a higher numbered entity to a mode of the same or lower priority.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_MODE_NEEDED (int @var{entity}, rtx @var{insn})
+@deftypefn {Target Hook} int TARGET_MODE_NEEDED (int @var{entity}, rtx_insn *@var{insn})
@var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}.
@end deftypefn
-@deftypefn {Target Hook} int TARGET_MODE_AFTER (int @var{entity}, int @var{mode}, rtx @var{insn})
+@deftypefn {Target Hook} int TARGET_MODE_AFTER (int @var{entity}, int @var{mode}, rtx_insn *@var{insn})
@var{entity} is an integer specifying a mode-switched entity. If this macro is defined, it is evaluated for every @var{insn} during mode switching. It determines the mode that an insn results in (if different from the incoming mode).
@end deftypefn
@@ -10842,7 +10842,7 @@ implementation returns true. You can use @code{can_use_doloop_if_innermost}
if the loop must be the innermost, and if there are no other restrictions.
@end deftypefn
-@deftypefn {Target Hook} {const char *} TARGET_INVALID_WITHIN_DOLOOP (const_rtx @var{insn})
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_WITHIN_DOLOOP (const rtx_insn *@var{insn})
Take an instruction in @var{insn} and return NULL if it is valid within a
low-overhead loop, otherwise return a string explaining why doloop
@@ -10855,7 +10855,7 @@ By default, the RTL loop optimizer does not use a present doloop pattern for
loops containing function calls or branch on table instructions.
@end deftypefn
-@deftypefn {Target Hook} bool TARGET_LEGITIMATE_COMBINED_INSN (rtx @var{insn})
+@deftypefn {Target Hook} bool TARGET_LEGITIMATE_COMBINED_INSN (rtx_insn *@var{insn})
Take an instruction in @var{insn} and return @code{false} if the instruction is not appropriate as a combination of two or more instructions. The default is to accept all instructions.
@end deftypefn