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| author | Jie Mei <jie.mei@oss.cipunited.com> | 2023-06-19 16:29:50 +0800 |
|---|---|---|
| committer | YunQiang Su <yunqiang.su@cipunited.com> | 2023-07-03 11:34:45 +0800 |
| commit | 926f2d09d9c1ffb8286583175ee4bb605903fbce (patch) | |
| tree | 95956f97c9dd9773bcf346dbf9986186a977d2d2 /gcc/doc | |
| parent | 1ebf37ece33bf48401afd332d55ef7bb6aedb4ab (diff) | |
| download | gcc-926f2d09d9c1ffb8286583175ee4bb605903fbce.zip gcc-926f2d09d9c1ffb8286583175ee4bb605903fbce.tar.gz gcc-926f2d09d9c1ffb8286583175ee4bb605903fbce.tar.bz2 | |
MIPS: Add basic support for mips16e2
The MIPS16e2 ASE is an enhancement to the MIPS16e ASE,
which includes all MIPS16e instructions, with some addition.
It defines new special instructions for increasing
code density (e.g. Extend, PC-relative instructions, etc.).
This patch adds basic support for mips16e2 used by the
following series of patches.
gcc/ChangeLog:
* config/mips/mips.cc(mips_file_start): Add mips16e2 info
for output file.
* config/mips/mips.h(__mips_mips16e2): Defined a new
predefine macro.
(ISA_HAS_MIPS16E2): Defined a new macro.
(ASM_SPEC): Pass mmips16e2 to the assembler.
* config/mips/mips.opt: Add -m(no-)mips16e2 option.
* config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
* doc/invoke.texi: Add -m(no-)mips16e2 option..
gcc/testsuite/ChangeLog:
* gcc.target/mips/mips.exp(mips_option_groups): Add -mmips16e2
option.
(mips-dg-init): Handle the recognization of mips16e2 targets.
(mips-dg-options): Add dependencies for mips16e2.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 26bcbe2..ed51ad5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -26895,6 +26895,13 @@ MIPS16 code generation can also be controlled on a per-function basis by means of @code{mips16} and @code{nomips16} attributes. @xref{Function Attributes}, for more information. +@opindex mmips16e2 +@opindex mno-mips16e2 +@item -mmips16e2 +@itemx -mno-mips16e2 +Use (do not use) the MIPS16e2 ASE. This option modifies the behavior +of the @option{-mips16} option such that it targets the MIPS16e2 ASE@. + @opindex mflip-mips16 @item -mflip-mips16 Generate MIPS16 code on alternating functions. This option is provided |