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| author | Bernd Schmidt <bernd.schmidt@analog.com> | 2008-10-22 19:42:56 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@gcc.gnu.org> | 2008-10-22 19:42:56 +0000 |
| commit | 318b30095aa0d7ffae6ac667a7d0bc290c8dbab1 (patch) | |
| tree | 0d7f113ba47efef4ad7893f5fba5a5b39bccfc31 /gcc/doc | |
| parent | 972afb58199cd9228dbf974fe0fbd698b430550e (diff) | |
| download | gcc-318b30095aa0d7ffae6ac667a7d0bc290c8dbab1.zip gcc-318b30095aa0d7ffae6ac667a7d0bc290c8dbab1.tar.gz gcc-318b30095aa0d7ffae6ac667a7d0bc290c8dbab1.tar.bz2 | |
gcc/:
From Mike Frysinger <michael.frysinger@analog.com>
* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF512,
BFIN_CPU_BF514, BFIN_CPU_BF516, and BFIN_CPU_BF518.
* config/bfin/bfin.c (bfin_cpus[]): Add 0.0 for bf512, bf514, bf516,
and bf518. Add 0.2 for bf522, bf523, bf524, bf526, and bf527.
Add 0.6 for bf533, bf532, and bf531. Add 0.5 for bf538 and bf539.
Add 0.2 for bf542, bf544, bf547, bf548, and bf549.
* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF512__
for BFIN_CPU_BF512, __ADSPBF514__ for BFIN_CPU_BF514, __ADSPBF516__
for BFIN_CPU_BF516, and __ADSPBF518__ for BFIN_CPU_BF518. Define
__ADSPBF51x__ for all of them.
* config/bfin/elf.h (LIB_SPEC): Select proper linker scripts for
-mcpu bf512, bf514, bf516, and bf518.
* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
bf512-none, bf514-none, bf516-none, and bf518-none.
* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
* config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
* doc/invoke.texi (Blackfin Options): Document that
-mcpu now accepts bf512, bf514, bf516, and bf518.
gcc/testsuite/:
From Mike Frysinger <michael.frysinger@analog.com>
* gcc.target/bfin/mcpu-bf522.c: Check SILICON_REVISION is 0x0002. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
* gcc.target/bfin/mcpu-bf523.c: Likewise.
* gcc.target/bfin/mcpu-bf524.c: Likewise.
* gcc.target/bfin/mcpu-bf525.c: Likewise.
* gcc.target/bfin/mcpu-bf526.c: Likewise.
* gcc.target/bfin/mcpu-bf527.c: Likewise.
* gcc.target/bfin/mcpu-bf531.c: Check SILICON_REVISION is 0x0006. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0006+.
* gcc.target/bfin/mcpu-bf532.c: Likewise.
* gcc.target/bfin/mcpu-bf533.c: Likewise.
* gcc.target/bfin/mcpu-bf538.c: Check SILICON_REVISION is 0x0005. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0005+.
* gcc.target/bfin/mcpu-bf539.c: Likewise.
* gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0002. Invert
check for __WORKAROUND_RETS when SILICON_REVISION is 0x0002+.
* gcc.target/bfin/mcpu-bf544.c: Likewise.
* gcc.target/bfin/mcpu-bf547.c: Likewise.
* gcc.target/bfin/mcpu-bf548.c: Likewise.
* gcc.target/bfin/mcpu-bf549.c: Likewise.
* gcc.target/bfin/mcpu-bf512.c: New file.
* gcc.target/bfin/mcpu-bf514.c: Likewise.
* gcc.target/bfin/mcpu-bf516.c: Likewise.
* gcc.target/bfin/mcpu-bf518.c: Likewise.
From-SVN: r141305
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index aa17a25..9016949 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -9119,10 +9119,10 @@ size. @item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @opindex mcpu= Specifies the name of the target Blackfin processor. Currently, @var{cpu} -can be one of @samp{bf522}, @samp{bf523}, @samp{bf524}, -@samp{bf525}, @samp{bf526}, @samp{bf527}, -@samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534}, -@samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, +can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518}, +@samp{bf522}, @samp{bf523}, @samp{bf524}, @samp{bf525}, @samp{bf526}, +@samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533}, +@samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, @samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549}, @samp{bf561}. The optional @var{sirevision} specifies the silicon revision of the target |