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authorNick Clifton <nickc@redhat.com>2004-08-04 13:54:51 +0000
committerNick Clifton <nickc@gcc.gnu.org>2004-08-04 13:54:51 +0000
commit2acc29bdd3bc49da5eca42a0f1c014f972e9ef20 (patch)
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parentd09212551a1bdf13af7b47b5e445783ba182113a (diff)
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config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the GCC ABI.
doc/invoke.texi: Document this new switch and also the -mrenesas switch. From-SVN: r85557
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/invoke.texi12
1 files changed, 11 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ce26d58..6332839e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -626,7 +626,7 @@ See RS/6000 and PowerPC Options.
-m5-32media -m5-32media-nofpu @gol
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
--mbigtable -mfmovd -mhitachi -mnomacsave @gol
+-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
-mieee -misize -mpadstruct -mspace @gol
-mprefergot -musermode}
@@ -10585,6 +10585,16 @@ Enable the use of the instruction @code{fmovd}.
@opindex mhitachi
Comply with the calling conventions defined by Renesas.
+@item -mrenesas
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
+
+@item -mno-renesas
+@opindex mhitachi
+Comply with the calling conventions defined for GCC before the Renesas
+conventions were available. This option is the default for all
+targets of the SH toolchain except for @samp{sh-symbianelf}.
+
@item -mnomacsave
@opindex mnomacsave
Mark the @code{MAC} register as call-clobbered, even if