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| author | Kito Cheng <kito@0xlab.org> | 2014-05-02 06:03:22 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 2014-05-02 00:03:22 -0600 |
| commit | ed15c5984e10f6556dffdf397accff804bf60a7c (patch) | |
| tree | 1c1189af105b1fefc74dac9b1e109c58d2d0656f /gcc/doc | |
| parent | 4bd2511b3c0f8bf4d447d5765c0b3a247c66ca89 (diff) | |
| download | gcc-ed15c5984e10f6556dffdf397accff804bf60a7c.zip gcc-ed15c5984e10f6556dffdf397accff804bf60a7c.tar.gz gcc-ed15c5984e10f6556dffdf397accff804bf60a7c.tar.bz2 | |
defaults.h (HONOR_REG_ALLOC_ORDER): Change HONOR_REG_ALLOC_ORDER to a C expression marco.
2014-02-26 Kito Cheng <kito@0xlab.org>
* defaults.h (HONOR_REG_ALLOC_ORDER): Change HONOR_REG_ALLOC_ORDER
to a C expression marco.
* ira-color.c (HONOR_REG_ALLOC_ORDER) : Ditto.
* config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Ditto.
* config/nds32/nds32.h (HONOR_REG_ALLOC_ORDER): Ditto.
* doc/tm.texi (HONOR_REG_ALLOC_ORDER): Update document for
HONOR_REG_ALLOC_ORDER.
* doc/tm.texi.in (HONOR_REG_ALLOC_ORDER): Ditto.
From-SVN: r210000
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/tm.texi | 4 | ||||
| -rw-r--r-- | gcc/doc/tm.texi.in | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index b8ca17e..ed35bcb 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for saving a register in the prologue and restoring it in the epilogue. This discourages it from using call-saved registers. If a machine wants to ensure that IRA allocates registers in the order given by REG_ALLOC_ORDER even if some -call-saved registers appear earlier than call-used ones, this macro -should be defined. +call-saved registers appear earlier than call-used ones, then define this +macro as a C expression to nonzero. Default is 0. @end defmac @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno}) diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index d793d26..a5c3741 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -1849,8 +1849,8 @@ Normally, IRA tries to estimate the costs for saving a register in the prologue and restoring it in the epilogue. This discourages it from using call-saved registers. If a machine wants to ensure that IRA allocates registers in the order given by REG_ALLOC_ORDER even if some -call-saved registers appear earlier than call-used ones, this macro -should be defined. +call-saved registers appear earlier than call-used ones, then define this +macro as a C expression to nonzero. Default is 0. @end defmac @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno}) |