diff options
| author | Victoria Stepanyan <victoria.stepanyan@amd.com> | 2015-12-06 17:02:48 +0000 |
|---|---|---|
| committer | Venkataramanan Kumar <vekumar@gcc.gnu.org> | 2015-12-06 17:02:48 +0000 |
| commit | 62e56a0d652ce83ae3d220cc4a01de46674188f1 (patch) | |
| tree | caf97ab569ab5baf08a9753bd71ed1d4c81deee5 /gcc/doc | |
| parent | 2097a8906f26415d7ad36f485ad7841ed5142fba (diff) | |
| download | gcc-62e56a0d652ce83ae3d220cc4a01de46674188f1.zip gcc-62e56a0d652ce83ae3d220cc4a01de46674188f1.tar.gz gcc-62e56a0d652ce83ae3d220cc4a01de46674188f1.tar.bz2 | |
support for AMD clzero isa.
gcc/ChangeLog
2015-12-06 Victoria Stepanyan <victoria.stepanyan@amd.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_CLZERO_SET): New.
(ix86_handle_option): Handle clzero.
* config.gcc (i[34567]86-*-*): Add clzerointrin.h,
(x86_64-*-*): Likewise.
* config/i386/clzerointrin.h: New header.
* config/i386/cpuid.h (bit_CLZERO): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
CLZERO support.
* config/i386/i386.opt (clzero): New.
* config/i386/i386-c.c: Define __CLZERO__ if needed.
* config/i386/i386.c (ix86_target_string): Define -mclzero option.
(PTA_CLZERO): New.
(ix86_option_override_internal): Handle new option.
(processor_alias_table): Added PTA_CLZERO.
(ix86_valid_target_attribute_inner_p): Add OPT_mclzero.
(ix86_builtins): Add IX86_BUILTIN_CLZERO, IX86_BUILTIN_CLZERO.
(ix86_expand_builtin): Handle IX86_BUILTIN_CLZERO and
IX86_BUILTIN_CLZERO built-ins.
* config/i386/i386.h (TARGET_CLZERO): New.
* config/i386/i386.md (unspecv): Add UNSPEC_CLZERO.
(clzero): New pattern.
(clzero_<mode>): New pattern.
* config/i386/x86intrin.h: Include clzerointrin.h.
* doc/extend.texi: Document clzero builtins.
* doc/invoke.texi: Document -mclzero option.
gcc/testsuite/ChangeLog
2015-12-06 Victoria Stepanyan <victoria.stepanyan@amd.com>
* gcc.target/i386/clzero.c: New.
* gcc.target/i386/sse-12.c: Add -mclzero.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r231340
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 6 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 5 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 650aa94..883d9b3 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18337,6 +18337,12 @@ void __builtin_ia32_monitorx (void *, unsigned int, unsigned int) void __builtin_ia32_mwaitx (unsigned int, unsigned int, unsigned int) @end smallexample +The following built-in functions are available when @option{-mclzero} is used. +All of them generate the machine instruction that is part of the name. +@smallexample +void __builtin_i32_clzero (void *) +@end smallexample + @node x86 transactional memory intrinsics @subsection x86 Transactional Memory Intrinsics diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 5256031..33f579f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1101,7 +1101,7 @@ See RS/6000 and PowerPC Options. -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol --mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx -mthreads @gol +-mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx -mclzero -mthreads @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -23216,6 +23216,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @need 200 @itemx -mmwaitx @opindex mmwaitx +@need 200 +@itemx -mclzero +@opindex mclzero These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, |