Support new interrupt handler options.

gcc/
	* config/mips/mips.c (mips_int_mask): New enum.
	(mips_shadow_set): Likewise.
	(int_mask): New variable.
	(use_shadow_register_set_p): Change type to enum mips_shadow_set.
	(machine_function): Add int_mask and use_shadow_register_set.
	(mips_attribute_table): Add attribute handlers for interrupt and
	use_shadow_register_set.
	(mips_interrupt_mask): New static function.
	(mips_handle_interrupt_attr): Likewise.
	(mips_handle_use_shadow_register_set_attr): Likewise.
	(mips_use_shadow_register_set): Change return type to enum
	mips_shadow_set.  Add argument handling for use_shadow_register_set
	attribute.
	(mips_interrupt_extra_called_saved_reg_p): Update the conditional to
	compare with mips_shadow_set enum.
	(mips_compute_frame_info): Add interrupt mask and
	use_shadow_register_set to per-function information structure.
	Add a stack slot for EPC unconditionally.
	(mips_expand_prologue): Compare use_shadow_register_set value
	with mips_shadow_set enum.  Save EPC always in K1, clobber only K1 for
	masked interrupt register but in EIC mode use K0 and save Cause in K0.
	EPC saved and restored unconditionally.  Use PMODE_INSN macro when
	copying the stack pointer from the shadow register set.
	* config/mips/mips.h (SR_IM0): New define.
	* config/mips/mips.md (mips_rdpgpr): Rename to...
	(mips_rdpgpr_<mode>): ...this.  Use the Pmode iterator.
	* doc/extend.texi (Declaring Attributes of Functions): Document
	optional arguments for interrupt and use_shadow_register_set
	attributes.

gcc/testsuite/
	* gcc.target/mips/interrupt_handler-4.c: New test.

Co-Authored-By: Robert Suchanek <robert.suchanek@imgtec.com>

From-SVN: r225819

1 files changed, 17 insertions, 5 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 82593b4..b18d8fb 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -4090,10 +4090,18 @@ These function attributes are supported by the MIPS back end:
 @table @code
 @item interrupt
 @cindex @code{interrupt} function attribute, MIPS
-Use this attribute to indicate
-that the specified function is an interrupt handler.  The compiler generates
-function entry and exit sequences suitable for use in an interrupt handler
-when this attribute is present.
+Use this attribute to indicate that the specified function is an interrupt
+handler.  The compiler generates function entry and exit sequences suitable
+for use in an interrupt handler when this attribute is present.
+An optional argument is supported for the interrupt attribute which allows
+the interrupt mode to be described.  By default GCC assumes the external
+interrupt controller (EIC) mode is in use, this can be explicitly set using
+@code{eic}.  When interrupts are non-masked then the requested Interrupt
+Priority Level (IPL) is copied to the current IPL which has the effect of only
+enabling higher priority interrupts.  To use vectored interrupt mode use
+the argument @code{vector=[sw0|sw1|hw0|hw1|hw2|hw3|hw4|hw5]}, this will change
+the behaviour of the non-masked interrupt support and GCC will arrange to mask
+all interrupts from sw0 up to and including the specified interrupt vector.
 
 You can use the following attributes to modify the behavior
 of an interrupt handler:
@@ -4101,7 +4109,9 @@ of an interrupt handler:
 @item use_shadow_register_set
 @cindex @code{use_shadow_register_set} function attribute, MIPS
 Assume that the handler uses a shadow register set, instead of
-the main general-purpose registers.
+the main general-purpose registers.  An optional argument @code{intstack} is
+supported to indicate that the shadow register set contains a valid stack
+pointer.
 
 @item keep_interrupts_masked
 @cindex @code{keep_interrupts_masked} function attribute, MIPS
@@ -4129,6 +4139,8 @@ void __attribute__ ((interrupt, keep_interrupts_masked,
 void __attribute__ ((interrupt, use_shadow_register_set,
                      keep_interrupts_masked,
                      use_debug_exception_return)) v7 ();
+void __attribute__ ((interrupt("eic"))) v8 ();
+void __attribute__ ((interrupt("vector=hw3"))) v9 ();
 @end smallexample
 
 @item long_call