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| author | Uros Bizjak <ubizjak@gmail.com> | 2014-05-17 13:28:39 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2014-05-17 13:28:39 +0200 |
| commit | 6ca74b5cf0e747981fed0a8e8e71cba37c03bd8b (patch) | |
| tree | 641b87e8104e24b6b9738be61c9c9008a1d74808 /gcc/doc | |
| parent | 95ac221a3a8c6856e206758657774cee5da453ff (diff) | |
| download | gcc-6ca74b5cf0e747981fed0a8e8e71cba37c03bd8b.zip gcc-6ca74b5cf0e747981fed0a8e8e71cba37c03bd8b.tar.gz gcc-6ca74b5cf0e747981fed0a8e8e71cba37c03bd8b.tar.bz2 | |
invoke.texi (free): Mention Alpha.
* doc/invoke.texi (free): Mention Alpha. Also enabled at -Os.
From-SVN: r210552
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6baaf2a..5b1b0f1 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -7463,7 +7463,8 @@ Attempt to remove redundant extension instructions. This is especially helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit registers after writing to their lower 32-bit half. -Enabled for AArch64 and x86 at levels @option{-O2}, @option{-O3}. +Enabled for Alpha, AArch64 and x86 at levels @option{-O2}, +@option{-O3}, @option{-Os}. @item -flive-range-shrinkage @opindex flive-range-shrinkage |