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author | Richard Henderson <richard.henderson@linaro.org> | 2019-11-19 13:14:20 +0000 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 2019-11-19 05:14:20 -0800 |
commit | 35ba842f23769782d1b12f31aa2cdfce70ece031 (patch) | |
tree | 1fe9113dde8e1c6c19097c649c50b8133605d7d1 /gcc/doc | |
parent | 5ecaaf98dc6678fab9607822ec083830c536eb68 (diff) | |
download | gcc-35ba842f23769782d1b12f31aa2cdfce70ece031.zip gcc-35ba842f23769782d1b12f31aa2cdfce70ece031.tar.gz gcc-35ba842f23769782d1b12f31aa2cdfce70ece031.tar.bz2 |
arm: Fixes for asm-flags vs thumb1 and ilp32
Thumb1 cannot support asm-flags currently, because we don't expose the
flags register to the compiler. Disable the support for that case.
Adjust the asm-flag-6 test for aarch64 ilp32 correctness.
gcc/
* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
to define __GCC_ASM_FLAG_OUTPUTS__.
* config/arm/arm.c (thumb1_md_asm_adjust): New function.
(arm_option_params_internal): Swap out targetm.md_asm_adjust
depending on TARGET_THUMB1.
* doc/extend.texi (FlagOutputOperands): Document thumb1 restriction.
gcc/testsuite/
* testsuite/gcc.target/arm/asm-flag-3.c: Skip for thumb1.
* testsuite/gcc.target/arm/asm-flag-5.c: Likewise.
* testsuite/gcc.target/arm/asm-flag-6.c: Likewise.
* testsuite/gcc.target/arm/asm-flag-4.c: New test.
* testsuite/gcc.target/aarch64/asm-flag-6.c: Use %w for
asm inputs to cmp instruction for ILP32.
From-SVN: r278443
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/extend.texi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 1c8ae0d..62a98e9 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -9810,6 +9810,8 @@ signed greater than signed less than equal @end table +The flag output constraints are not supported in thumb1 mode. + @item x86 family The flag output constraints for the x86 family are of the form @samp{=@@cc@var{cond}} where @var{cond} is one of the standard |