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| author | Peter Bergner <bergner@vnet.ibm.com> | 2008-05-21 13:09:07 -0500 |
|---|---|---|
| committer | Peter Bergner <bergner@gcc.gnu.org> | 2008-05-21 13:09:07 -0500 |
| commit | 4adf80083777c772d96022b9028b770137424a33 (patch) | |
| tree | 3d40d0ffbcebb035a9198eac883604574a1d1e45 /gcc/doc | |
| parent | 00a25a2d39c992235f57f6d891a407144236760c (diff) | |
| download | gcc-4adf80083777c772d96022b9028b770137424a33.zip gcc-4adf80083777c772d96022b9028b770137424a33.tar.gz gcc-4adf80083777c772d96022b9028b770137424a33.tar.bz2 | |
invoke.texi: Add cpu_type's 464 and 464fp.
* doc/invoke.texi: Add cpu_type's 464 and 464fp.
(-mmulhw): Add 464 to description.
(-mdlmzb): Likewise.
* config.gcc: Handle --with-cpu=464 and --with-cpu=464fp.
* config/rs6000/rs6000.c (processor_target_table): Add 464 and
464fp entries.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add 464 and 464fp support.
* config/rs6000/t-fprules (MULTILIB_MATCHES_FLOAT): Include -mcpu=464.
* config/rs6000/rs6000.md: Update comments for 464.
From-SVN: r135730
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e515a0f..4c05203 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12990,8 +12990,8 @@ should normally not specify either @option{-mnew-mnemonics} or Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type @var{cpu_type}. Supported values for @var{cpu_type} are @samp{401}, @samp{403}, -@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{505}, -@samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604}, +@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp}, +@samp{505}, @samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, @samp{860}, @samp{970}, @samp{8540}, @samp{e300c2}, @samp{e300c3}, @@ -13289,7 +13289,7 @@ hardware floating is used. @opindex mmulhw @opindex mno-mulhw Generate code that uses (does not use) the half-word multiply and -multiply-accumulate instructions on the IBM 405 and 440 processors. +multiply-accumulate instructions on the IBM 405, 440 and 464 processors. These instructions are generated by default when targetting those processors. @@ -13298,7 +13298,7 @@ processors. @opindex mdlmzb @opindex mno-dlmzb Generate code that uses (does not use) the string-search @samp{dlmzb} -instruction on the IBM 405 and 440 processors. This instruction is +instruction on the IBM 405, 440 and 464 processors. This instruction is generated by default when targetting those processors. @item -mno-bit-align |