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author | H.J. Lu <hongjiu.lu@intel.com> | 2007-05-31 19:52:24 +0000 |
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committer | H.J. Lu <hjl@gcc.gnu.org> | 2007-05-31 12:52:24 -0700 |
commit | 3b8dd0716ff7c5411334c1f0ad61306ec97ac6e9 (patch) | |
tree | af5f8a80f0f784ca8b3ed00d982749ac5b74a6e3 /gcc/doc | |
parent | ccb4d26be0082d11486c820ca78699c9e1332d23 (diff) | |
download | gcc-3b8dd0716ff7c5411334c1f0ad61306ec97ac6e9.zip gcc-3b8dd0716ff7c5411334c1f0ad61306ec97ac6e9.tar.gz gcc-3b8dd0716ff7c5411334c1f0ad61306ec97ac6e9.tar.bz2 |
config.gcc (i[34567]86-*-*): Add nmmintrin.h to extra_headers.
2007-05-31 H.J. Lu <hongjiu.lu@intel.com>
* config.gcc (i[34567]86-*-*): Add nmmintrin.h to
extra_headers.
(x86_64-*-*): Likewise.
* config/i386/i386.c (OPTION_MASK_ISA_MMX_UNSET): New.
(OPTION_MASK_ISA_3DNOW_UNSET): Likewise.
(OPTION_MASK_ISA_SSE_UNSET): Likewise.
(OPTION_MASK_ISA_SSE2_UNSET): Likewise.
(OPTION_MASK_ISA_SSE3_UNSET): Likewise.
(OPTION_MASK_ISA_SSSE3_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4_1_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4_2_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4): Likewise.
(OPTION_MASK_ISA_SSE4_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4A_UNSET): Likewise.
(ix86_handle_option): Use OPTION_MASK_ISA_*_UNSET. Handle
SSE4.2.
(override_options): Support SSE4.2.
(ix86_build_const_vector): Support SImode and DImode.
(ix86_build_signbit_mask): Likewise.
(ix86_expand_int_vcond): Support V2DImode.
(IX86_BUILTIN_CRC32QI): New for SSE4.2.
(IX86_BUILTIN_CRC32HI): Likewise.
(IX86_BUILTIN_CRC32SI): Likewise.
(IX86_BUILTIN_CRC32DI): Likewise.
(IX86_BUILTIN_PCMPGTQ): Likewise.
(bdesc_crc32): Likewise.
(bdesc_sse_3arg): Likewise.
(ix86_expand_crc32): Likewise.
(ix86_init_mmx_sse_builtins): Support SSE4.2.
(ix86_expand_builtin): Likewise.
* config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Define
__SSE4_2__ for -msse4.2.
* config/i386/i386.md (UNSPEC_CRC32): New for SSE4.2.
(CRC32MODE): Likewise.
(crc32modesuffix): Likewise.
(crc32modeconstraint): Likewise.
(sse4_2_crc32<mode>): Likewise.
(sse4_2_crc32di): Likewise.
* config/i386/i386.opt (msse4.2): New for SSE4.2.
(msse4): Likewise.
* config/i386/nmmintrin.h: New. The dummy SSE4.2 intrinsic header
file.
* config/i386/smmintrin.h: Add SSE4.2 intrinsics.
* config/i386/sse.md (sse4_2_gtv2di3): New pattern for
SSE4.2.
(vcond<mode>): Use SSEMODEI instead of SSEMODE124.
(vcondu<mode>): Likewise.
* doc/extend.texi: Document SSE4.2 built-in functions.
* doc/invoke.texi: Document -msse4.2/-msse4.
From-SVN: r125236
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/extend.texi | 48 | ||||
-rw-r--r-- | gcc/doc/invoke.texi | 6 |
2 files changed, 53 insertions, 1 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e1104dc..4217eaa 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -7502,6 +7502,54 @@ Generates the @code{pextrd} machine instruction. Generates the @code{pextrq} machine instruction in 64bit mode. @end table +The following built-in functions are available when @option{-msse4.2} is +used. All of them generate the machine instruction that is part of the +name. + +@smallexample +v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int) +int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int) +v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int) +int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int) +__v2di __builtin_ia32_pcmpgtq (__v2di, __v2di) +@end smallexample + +The following built-in functions are available when @option{-msse4.2} is +used. + +@table @code +unsigned int __builtin_ia32_crc32qi (unsigned int, unsigned char) +Generates the @code{crc32b} machine instruction. +unsigned int __builtin_ia32_crc32hi (unsigned int, unsigned short) +Generates the @code{crc32w} machine instruction. +unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int) +Generates the @code{crc32l} machine instruction. +unsigned long long __builtin_ia32_crc32di (unsigned int, unsigned long long) +@end table + +The following built-in functions are changed to generate new SSE4.2 +instructions when @option{-msse4.2} is used. + +@table @code +int __builtin_popcount (unsigned int) +Generates the @code{popcntl} machine instruction. +int __builtin_popcountl (unsigned long) +Generates the @code{popcntl} or @code{popcntq} machine instruction, +depending on the size of @code{unsigned long}. +int __builtin_popcountll (unsigned long long) +Generates the @code{popcntq} machine instruction. +@end table + The following built-in functions are available when @option{-msse4a} is used. @smallexample diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index f93aeb1..4aedf30 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -548,7 +548,7 @@ Objective-C and Objective-C++ Dialects}. -mno-fp-ret-in-387 -msoft-float @gol -mno-wide-multiply -mrtd -malign-double @gol -mpreferred-stack-boundary=@var{num} -mcx16 -msahf @gol --mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 @gol +-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 @gol -msse4a -m3dnow -mpopcnt -mabm @gol -mthreads -mno-align-stringops -minline-all-stringops @gol -mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol @@ -10273,6 +10273,10 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -mno-ssse3 @item -msse4.1 @itemx -mno-sse4.1 +@item -msse4.2 +@itemx -mno-sse4.2 +@item -msse4 +@itemx -mno-sse4 @item -msse4a @item -mno-sse4a @item -m3dnow |