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author | Martin Liska <mliska@suse.cz> | 2022-10-13 15:54:17 +0200 |
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committer | Martin Liska <mliska@suse.cz> | 2022-10-13 15:54:17 +0200 |
commit | bd21c04269deded2c7476ceca1100a26f28ea526 (patch) | |
tree | 197bf75eedac69362078a4ccc0afe5615c45c327 /gcc/doc | |
parent | d9e7934d25da4a78ffef1f738206aa1d897911df (diff) | |
parent | 786e4c024f941671a233f5779d73a5d22f4e9588 (diff) | |
download | gcc-bd21c04269deded2c7476ceca1100a26f28ea526.zip gcc-bd21c04269deded2c7476ceca1100a26f28ea526.tar.gz gcc-bd21c04269deded2c7476ceca1100a26f28ea526.tar.bz2 |
Merge branch 'master' into devel/sphinx
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 3101021..c6de620 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -2935,6 +2935,9 @@ Version 17, which first appeared in G++ 12, fixes layout of classes that inherit from aggregate classes with default member initializers in C++14 and up. +Version 18, which first appeard in G++ 13, fixes manglings of lambdas +that have additional context. + See also @option{-Wabi}. @item -fabi-compat-version=@var{n} @@ -20858,15 +20861,11 @@ This is the default for @option{-Os}. @item -mRcq @opindex mRcq -Enable @samp{Rcq} constraint handling. -Most short code generation depends on this. -This is the default. +Does nothing. Preserved for backward compatibility. @item -mRcw @opindex mRcw -Enable @samp{Rcw} constraint handling. -Most ccfsm condexec mostly depends on this. -This is the default. +Does nothing. Preserved for backward compatibility. @item -msize-level=@var{level} @opindex msize-level @@ -32016,11 +32015,11 @@ Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, -AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2 +AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, -MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, -SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 -and AVX512BF16 instruction set support. +MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, +UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16 and AVX512BF16 +instruction set support. @item alderlake Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, |