diff options
| author | Martin Liska <mliska@suse.cz> | 2021-05-17 15:53:06 +0200 |
|---|---|---|
| committer | Martin Liska <mliska@suse.cz> | 2021-05-17 15:53:06 +0200 |
| commit | 6ec928c2ae25f84be1ca022be60dadea5140c155 (patch) | |
| tree | e59b3c930c84acb9b96fc18cd13883411af91e27 /gcc/doc | |
| parent | 9c217a1395dad1fa1cf9c3e3ac6e3a330cb003ae (diff) | |
| parent | e0a5daf81f2c79a0275eccd7c1a25349990a7a4d (diff) | |
| download | gcc-6ec928c2ae25f84be1ca022be60dadea5140c155.zip gcc-6ec928c2ae25f84be1ca022be60dadea5140c155.tar.gz gcc-6ec928c2ae25f84be1ca022be60dadea5140c155.tar.bz2 | |
Merge branch 'master' into devel/sphinx
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 26 | ||||
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 6 |
2 files changed, 27 insertions, 5 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 852617d..dc0bde8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1240,7 +1240,8 @@ See RS/6000 and PowerPC Options. -mgnu-attribute -mno-gnu-attribute @gol -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol -mstack-protector-guard-offset=@var{offset} -mprefixed -mno-prefixed @gol --mpcrel -mno-pcrel -mmma -mno-mmma} +-mpcrel -mno-pcrel -mmma -mno-mmma -mrop-protect -mno-rop-protect @gol +-mprivileged -mno-privileged} @emph{RX Options} @gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol @@ -26284,6 +26285,12 @@ Generate code for given the specified PTX ISA (e.g.@: @samp{sm_35}). ISA strings must be lower-case. Valid ISA strings include @samp{sm_30} and @samp{sm_35}. The default ISA is sm_35. +@item -mptx=@var{version-string} +@opindex mptx +Generate code for given the specified PTX version (e.g.@: @samp{6.3}). +Valid version strings include @samp{3.1} and @samp{6.3}. The default PTX +version is 3.1. + @item -mmainkernel @opindex mmainkernel Link in code for a __main kernel. This is for stand-alone instead of @@ -27023,7 +27030,8 @@ following options: -mmulhw -mdlmzb -mmfpgpr -mvsx @gol -mcrypto -mhtm -mpower8-fusion -mpower8-vector @gol -mquad-memory -mquad-memory-atomic -mfloat128 @gol --mfloat128-hardware -mprefixed -mpcrel -mmma} +-mfloat128-hardware -mprefixed -mpcrel -mmma @gol +-mrop-protect} The particular options set for any particular CPU varies between compiler versions, depending on what setting seems to produce optimal @@ -28028,6 +28036,20 @@ store instructions when the option @option{-mcpu=future} is used. Generate (do not generate) the MMA instructions when the option @option{-mcpu=future} is used. +@item -mrop-protect +@itemx -mno-rop-protect +@opindex mrop-protect +@opindex mno-rop-protect +Generate (do not generate) ROP protection instructions when the target +processor supports them. Currently this option disables the shrink-wrap +optimization (@option{-fshrink-wrap}). + +@item -mprivileged +@itemx -mno-privileged +@opindex mprivileged +@opindex mno-privileged +Generate (do not generate) code that will run in privileged state. + @item -mblock-ops-unaligned-vsx @itemx -mno-block-ops-unaligned-vsx @opindex block-ops-unaligned-vsx diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 3a1d653..ceb6b99 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2125,9 +2125,9 @@ ARM Target supports options suitable for accessing the SIMD32 intrinsics from @code{arm_acle.h}. Some multilibs may be incompatible with these options. -@item arm_qbit_ok -@anchor{arm_qbit_ok} -ARM Target supports options suitable for accessing the Q-bit manipulation +@item arm_sat_ok +@anchor{arm_sat_ok} +ARM Target supports options suitable for accessing the saturation intrinsics from @code{arm_acle.h}. Some multilibs may be incompatible with these options. |