Support Intel AVX-NE-CONVERT

gcc/ChangeLog:

	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVXNECONVERT_SET,
	OPTION_MASK_ISA2_AVXNECONVERT_UNSET): New.
	(ix86_handle_option): Handle -mavxneconvert, unset
	avxneconvert when avx2 is disabled.
	* common/config/i386/i386-cpuinfo.h (processor_types): Add
	FEATURE_AVXNECONVERT.
	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
	avxneconvert.
	* common/config/i386/cpuinfo.h (get_available_features):
	Detect avxneconvert.
	* config.gcc: Add avxneconvertintrin.h
	* config/i386/avxneconvertintrin.h: New.
	* config/i386/avx512bf16vlintrin.h (_mm256_cvtneps_pbh):
	Unified builtin with avxneconvert.
	(_mm_cvtneps_pbh): Ditto.
	* config/i386/cpuid.h (bit_AVXNECONVERT): New.
	* config/i386/i386-builtin-types.def: Add
	DEF_POINTER_TYPE (PCV8HF, V8HF, CONST),
	DEF_POINTER_TYPE (PCV8BF, V8BF, CONST),
	DEF_POINTER_TYPE (PCV16HF, V16HF, CONST),
	DEF_POINTER_TYPE (PCV16BF, V16BF, CONST),
	DEF_FUNCTION_TYPE (V4SF, PCBFLOAT16),
	DEF_FUNCTION_TYPE (V4SF, PCFLOAT16),
	DEF_FUNCTION_TYPE (V8SF, PCBFLOAT16),
	DEF_FUNCTION_TYPE (V8SF, PCFLOAT16),
	DEF_FUNCTION_TYPE (V4SF, PCV8BF),
	DEF_FUNCTION_TYPE (V4SF, PCV8HF),
	DEF_FUNCTION_TYPE (V8SF, PCV16HF),
	DEF_FUNCTION_TYPE (V8SF, PCV16BF),
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	__AVXNECONVERT__.
	* config/i386/i386-expand.cc (ix86_expand_special_args_builtin):
	Handle V4SF_FTYPE_PCBFLOAT16,V8SF_FTYPE_PCBFLOAT16, V4SF_FTYPE_PCFLOAT16,
	V8SF_FTYPE_PCFLOAT16,V4SF_FTYPE_PCV8BF,
	V4SF_FTYPE_PCV8HF,V8SF_FTYPE_PCV16BF,V8SF_FTYPE_PCV16HF.
	* config/i386/i386-isa.def : Add DEF_PTA(AVXNECONVERT) New.
	* config/i386/i386-options.cc (isa2_opts): Add -mavxneconvert.
	(ix86_valid_target_attribute_inner_p): Handle avxneconvert.
	* config/i386/i386.md: Add attr avx512bf16vl and avxneconvert.
	* config/i386/i386.opt: Add option -mavxneconvert.
	* config/i386/immintrin.h: Inculde avxneconvertintrin.h.
	* config/i386/sse.md (vbcstnebf162ps_<mode>): New define_insn.
	(vbcstnesh2ps_<mode>): Ditto.
	(vcvtnee<bf16_ph>2ps_<mode>):Ditto.
	(vcvtneo<bf16_ph>2ps_<mode>):Ditto.
	(vcvtneps2bf16_v4sf): Ditto.
	(*vcvtneps2bf16_v4sf): Ditto.
	(vcvtneps2bf16_v8sf): Ditto.
	* doc/invoke.texi: Document -mavxneconvert.
	* doc/extend.texi: Document avxneconvert.
	* doc/sourcebuild.texi: Document target avxneconvert.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx-check.h: Add avxneconvert check.
	* gcc.target/i386/funcspec-56.inc: Add new target attribute.
	* gcc.target/i386/sse-12.c: Add -mavxneconvert.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* g++.dg/other/i386-2.C: Ditto.
	* g++.dg/other/i386-3.C: Ditto.
	* lib/target-supports.exp:add check_effective_target_avxneconvert.
	* gcc.target/i386/avx-ne-convert-1.c: New test.
	* gcc.target/i386/avx-ne-convert-vbcstnebf162ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vbcstnesh2ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vcvtneebf162ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vcvtneeph2ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vcvtneobf162ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vcvtneoph2ps-2.c: Ditto.
	* gcc.target/i386/avx-ne-convert-vcvtneps2bf16-2.c: Ditto.
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: Rename..
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1a.c: To this.
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1b.c: New test.

3 files changed, 14 insertions, 3 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 77ea545..53478b7 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -7070,6 +7070,11 @@ Enable/disable the generation of the AVXIFMA instructions.
 @cindex @code{target("avxvnniint8")} function attribute, x86
 Enable/disable the generation of the AVXVNNIINT8 instructions.
 
+@item avxneconvert
+@itemx no-avxneconvert
+@cindex @code{target("avxneconvert")} function attribute, x86
+Enable/disable the generation of the AVXNECONVERT instructions.
+
 @item cld
 @itemx no-cld
 @cindex @code{target("cld")} function attribute, x86
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 550aec8..c6323a5 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1437,7 +1437,7 @@ See RS/6000 and PowerPC Options.
 -mavx5124fmaps  -mavx512vnni  -mavx5124vnniw  -mprfchw  -mrdpid @gol
 -mrdseed  -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
 -mamx-tile  -mamx-int8  -mamx-bf16 -muintr -mhreset -mavxvnni@gol
--mavx512fp16 -mavxifma -mavxvnniint8 @gol
+-mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert @gol
 -mcldemote  -mms-bitfields  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically  -mstringop-strategy=@var{alg} @gol
 -mkl -mwidekl @gol
@@ -32967,6 +32967,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @need 200
 @itemx -mavxvnniint8
 @opindex mavxvnniint8
+@need 200
+@itemx -mavxneconvert
+@opindex mavxneconvert
 These switches enable the use of instructions in the MMX, SSE,
 SSE2, SSE3, SSSE3, SSE4, SSE4A, SSE4.1, SSE4.2, AVX, AVX2, AVX512F, AVX512PF,
 AVX512ER, AVX512CD, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, SHA,
@@ -32977,8 +32980,8 @@ XSAVEOPT, XSAVEC, XSAVES, RTM, HLE, TBM, MWAITX, CLZERO, PKU, AVX512VBMI2,
 GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, AVX512BF16,
 ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE,
 UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512FP16,
-AVXIFMA, AVXVNNIINT8 or CLDEMOTE extended instruction sets. Each has a
-corresponding @option{-mno-} option to disable use of these instructions.
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT or CLDEMOTE extended instruction sets. Each
+has a corresponding @option{-mno-} option to disable use of these instructions.
 
 These extensions are also available as built-in functions: see
 @ref{x86 Built-in Functions}, for details of the functions enabled and
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index e21a1d3..a12175b 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2493,6 +2493,9 @@ Target supports the execution of @code{avx512vp2intersect} instructions.
 @item avxifma
 Target supports the execution of @code{avxifma} instructions.
 
+@item avxneconvert
+Target supports the execution of @code{avxneconvert} instructions.
+
 @item avxvnniint8
 Target supports the execution of @code{avxvnniint8} instructions.