Support Intel AVX-VNNI-INT8

gcc/ChangeLog

	* common/config/i386/cpuinfo.h (get_available_features): Detect
	avxvnniint8.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVXVNNIINT8_SET): New.
	(OPTION_MASK_ISA2_AVXVNNIINT8_UNSET): Ditto.
	(ix86_handle_option): Handle -mavxvnniint8.
	* common/config/i386/i386-cpuinfo.h (enum processor_features):
	Add FEATURE_AVXVNNIINT8.
	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
	avxvnniint8.
	* config.gcc: Add avxvnniint8intrin.h.
	* config/i386/avxvnniint8intrin.h: New file.
	* config/i386/cpuid.h (bit_AVXVNNIINT8): New.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	__AVXVNNIINT8__.
	* config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint8.
	(ix86_valid_target_attribute_inner_p): Handle avxvnniint8.
	* config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT8) New..
	* config/i386/i386.opt: Add option -mavxvnniint8.
	* config/i386/immintrin.h: Include avxvnniint8intrin.h.
	* config/i386/sse.md (UNSPEC_VPMADDUBSWACCD
	UNSPEC_VPMADDUBSWACCSSD,UNSPEC_VPMADDWDACCD,
	UNSPEC_VPMADDWDACCSSD): Rename according to new style.
	(vpdp<vpdotprodtype>_<mode>): New define_insn.
	* doc/extend.texi: Document avxvnniint8.
	* doc/invoke.texi: Document -mavxvnniint8.
	* doc/sourcebuild.texi: Document target avxvnniint8.

gcc/testsuite/ChangeLog

	* g++.dg/other/i386-2.C: Add -mavxvnniint8.
	* g++.dg/other/i386-3.C: Ditto.
	* gcc.target/i386/avx-check.h: Add avxvnniint8 check.
	* gcc.target/i386/sse-12.c: Add -mavxvnniint8.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* gcc.target/i386/funcspec-56.inc: Add new target attribute.
	* lib/target-supports.exp
	(check_effective_target_avxvnniint8): New.
	* gcc.target/i386/avxvnniint8-1.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbssd-2.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbssds-2.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbsud-2.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbsuds-2.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbuud-2.c: Ditto.
	* gcc.target/i386/avxvnniint8-vpdpbuuds-2.c: Ditto.

Co-authored-by: Hongyu Wang <hongyu.wang@intel.com>
Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>

3 files changed, 14 insertions, 3 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index f205542..e2dbc1d 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -7065,6 +7065,11 @@ Enable/disable the generation of the AVXVNNI instructions.
 @cindex @code{target("avxifma")} function attribute, x86
 Enable/disable the generation of the AVXIFMA instructions.
 
+@item avxvnniint8
+@itemx no-avxvnniint8
+@cindex @code{target("avxvnniint8")} function attribute, x86
+Enable/disable the generation of the AVXVNNIINT8 instructions.
+
 @item cld
 @itemx no-cld
 @cindex @code{target("cld")} function attribute, x86
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a4850dd..4df2917 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1436,7 +1436,7 @@ See RS/6000 and PowerPC Options.
 -mavx5124fmaps  -mavx512vnni  -mavx5124vnniw  -mprfchw  -mrdpid @gol
 -mrdseed  -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
 -mamx-tile  -mamx-int8  -mamx-bf16 -muintr -mhreset -mavxvnni@gol
--mavx512fp16 -mavxifma @gol
+-mavx512fp16 -mavxifma -mavxvnniint8 @gol
 -mcldemote  -mms-bitfields  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically  -mstringop-strategy=@var{alg} @gol
 -mkl -mwidekl @gol
@@ -32907,6 +32907,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @need 200
 @itemx -mavxifma
 @opindex mavxifma
+@need 200
+@itemx -mavxvnniint8
+@opindex mavxvnniint8
 These switches enable the use of instructions in the MMX, SSE,
 SSE2, SSE3, SSSE3, SSE4, SSE4A, SSE4.1, SSE4.2, AVX, AVX2, AVX512F, AVX512PF,
 AVX512ER, AVX512CD, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, SHA,
@@ -32917,8 +32920,8 @@ XSAVEOPT, XSAVEC, XSAVES, RTM, HLE, TBM, MWAITX, CLZERO, PKU, AVX512VBMI2,
 GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, AVX512BF16,
 ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE,
 UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512FP16,
-AVXIFMA or CLDEMOTE extended instruction sets. Each has a corresponding
-@option{-mno-} option to disable use of these instructions.
+AVXIFMA, AVXVNNIINT8 or CLDEMOTE extended instruction sets. Each has a
+corresponding @option{-mno-} option to disable use of these instructions.
 
 These extensions are also available as built-in functions: see
 @ref{x86 Built-in Functions}, for details of the functions enabled and
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 0173acf..e21a1d3 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2493,6 +2493,9 @@ Target supports the execution of @code{avx512vp2intersect} instructions.
 @item avxifma
 Target supports the execution of @code{avxifma} instructions.
 
+@item avxvnniint8
+Target supports the execution of @code{avxvnniint8} instructions.
+
 @item amx_tile
 Target supports the execution of @code{amx-tile} instructions.