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| author | Jiong Wang <jiong.wang@arm.com> | 2015-07-01 09:01:47 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2015-07-01 09:01:47 +0000 |
| commit | d0baaae35172c6cfb7a0c314842bf2cfc62a40f2 (patch) | |
| tree | 9574ff7298c822e93caae68d182a53b0b406df56 /gcc/doc | |
| parent | 8997ef1850cee602e321210e23c85af6b85bccc0 (diff) | |
| download | gcc-d0baaae35172c6cfb7a0c314842bf2cfc62a40f2.zip gcc-d0baaae35172c6cfb7a0c314842bf2cfc62a40f2.tar.gz gcc-d0baaae35172c6cfb7a0c314842bf2cfc62a40f2.tar.bz2 | |
[AArch64] Document several AArch64-specific test directives
2015-07-01 Jiong Wang <jiong.wang@arm.com>
* doc/sourcebuild.texi (AArch64-specific attributes): Document
"aarch64_tiny", "aarch64_small", "aarch64_large",
"aarch64_little_endian", "aarch64_big_endian".
From-SVN: r225233
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 52a4aa4..d339d1e 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1583,6 +1583,16 @@ ARM target prefers @code{LDRD} and @code{STRD} instructions over @subsubsection AArch64-specific attributes @table @code +@item aarch64_tiny +AArch64 target which generates instruction sequences for tiny memory model. +@item aarch64_small +AArch64 target which generates instruction sequences for small memory model. +@item aarch64_large +AArch64 target which generates instruction sequences for large memory model. +@item aarch64_little_endian +AArch64 target which generates instruction sequences for little endian. +@item aarch64_big_endian +AArch64 target which generates instruction sequences for big endian. @item aarch64_small_fpic Binutils installed on test system supports relocation types required by -fpic for AArch64 small memory model. |