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| author | Andrew Pinski <quic_apinski@quicinc.com> | 2024-07-22 21:23:38 -0700 |
|---|---|---|
| committer | Thomas Koenig <tkoenig@gcc.gnu.org> | 2024-07-28 19:05:51 +0200 |
| commit | b34504a2594337d295875dc604c355aa851dd4aa (patch) | |
| tree | 7d5d2deca4f5b263544e4ce3039ad33e119b9f0c /gcc/doc | |
| parent | 43d803bcb2325cc6659c39c4d264e5ce9c396f60 (diff) | |
| download | gcc-b34504a2594337d295875dc604c355aa851dd4aa.zip gcc-b34504a2594337d295875dc604c355aa851dd4aa.tar.gz gcc-b34504a2594337d295875dc604c355aa851dd4aa.tar.bz2 | |
optabs/rs6000: Rename iorc and andc to iorn and andn
When I was trying to add an scalar version of iorc and andc, the optab that
got matched was for and/ior with the mode of csi and cdi instead of iorc and
andc optabs for si and di modes. Since csi/cdi are the complex integer modes,
we need to rename the optabs to be without c there. This changes c to n which
is a neutral and known not to be first letter of a mode.
Bootstrapped and tested on x86_64 and powerpc64le.
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def: s/iorc/iorn/. s/andc/andn/
for the code.
* config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Update
to iorn.
* config/rs6000/rs6000.md (andc<mode>3): Rename to ...
(andn<mode>3): This.
(iorc<mode>3): Rename to ...
(iorn<mode>3): This.
* doc/md.texi: Update documentation for the rename.
* internal-fn.def (BIT_ANDC): Rename to ...
(BIT_ANDN): This.
(BIT_IORC): Rename to ...
(BIT_IORN): This.
* optabs.def (andc_optab): Rename to ...
(andn_optab): This.
(iorc_optab): Rename to ...
(iorn_optab): This.
* gimple-isel.cc (gimple_expand_vec_cond_expr): Update for the
renamed internal functions, ANDC/IORC to ANDN/IORN.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/md.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index ecb7f34..5dc0d55 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5555,13 +5555,13 @@ Both scalar and vector integer modes are allowed. @item @samp{sstrunc@var{m}@var{n}2} Similar but for signed. -@cindex @code{andc@var{m}3} instruction pattern -@item @samp{andc@var{m}3} +@cindex @code{andn@var{m}3} instruction pattern +@item @samp{andn@var{m}3} Like @code{and@var{m}3}, but it uses bitwise-complement of operand 2 rather than operand 2 itself. -@cindex @code{iorc@var{m}3} instruction pattern -@item @samp{iorc@var{m}3} +@cindex @code{iorn@var{m}3} instruction pattern +@item @samp{iorn@var{m}3} Like @code{ior@var{m}3}, but it uses bitwise-complement of operand 2 rather than operand 2 itself. |