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| author | Carl Love <cel@linux.ibm.com> | 2024-07-09 13:31:22 -0400 |
|---|---|---|
| committer | Carl Love <cel@linux.ibm.com> | 2024-07-09 13:34:49 -0400 |
| commit | 807bed024d03f73bc1cf47ac8f23da9307c88464 (patch) | |
| tree | c57bb83939cdddb9ae63d67765138a36189e4b87 /gcc/doc | |
| parent | 8d6326eeb773076643d9babf55f7cca19968313e (diff) | |
| download | gcc-807bed024d03f73bc1cf47ac8f23da9307c88464.zip gcc-807bed024d03f73bc1cf47ac8f23da9307c88464.tar.gz gcc-807bed024d03f73bc1cf47ac8f23da9307c88464.tar.bz2 | |
rs6000, add overloaded vec_sel with int128 arguments
Extend the vec_sel built-in to take three signed/unsigned/bool int128
arguments and return a signed/unsigned/bool int128 result.
Extending the vec_sel built-in makes the existing buit-ins
__builtin_vsx_xxsel_1ti and __builtin_vsx_xxsel_1ti_uns obsolete. The
patch removes these built-ins.
The patch adds documentation and test cases for the new overloaded
vec_sel built-ins.
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_1ti,
__builtin_vsx_xxsel_1ti_uns): Remove built-in definitions.
* config/rs6000/rs6000-overload.def (vec_sel): Add new
overloaded vector signed, unsigned and bool 128-bit definitions.
* doc/extend.texi (vec_sel): Add documentation for new instances
with signed, unsigned and bool 129-bit bool arguments.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/builtins-10-runnable.c: New runnable test
file.
* gcc.target/powerpc/builtins-10.c: New compile only test file.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 98e3966..6ab6984 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -21444,6 +21444,26 @@ Additional built-in functions are available for the 64-bit PowerPC family of processors, for efficient use of 128-bit floating point (@code{__float128}) values. +Vector select + +@smallexample +vector signed __int128 vec_sel (vector signed __int128, + vector signed __int128, vector bool __int128); +vector signed __int128 vec_sel (vector signed __int128, + vector signed __int128, vector unsigned __int128); +vector unsigned __int128 vec_sel (vector unsigned __int128, + vector unsigned __int128, vector bool __int128); +vector unsigned __int128 vec_sel (vector unsigned __int128, + vector unsigned __int128, vector unsigned __int128); +vector bool __int128 vec_sel (vector bool __int128, + vector bool __int128, vector bool __int128); +vector bool __int128 vec_sel (vector bool __int128, + vector bool __int128, vector unsigned __int128); +@end smallexample + +The instance is an extension of the exiting overloaded built-in @code{vec_sel} +that is documented in the PVIPR. + @node Basic PowerPC Built-in Functions Available on ISA 2.06 @subsubsection Basic PowerPC Built-in Functions Available on ISA 2.06 |