diff options
| author | Jan Hubicka <jh@suse.cz> | 2004-02-26 22:43:37 +0100 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2004-02-26 21:43:37 +0000 |
| commit | 5bbeea44287b696a88f71d3ed97918ccdaa2e2db (patch) | |
| tree | 534a37599db0bfd5c0ccf6afbf9f429e3a2ebc75 /gcc/doc | |
| parent | a749e46c012110579069947adb6fbfffb6c573fe (diff) | |
| download | gcc-5bbeea44287b696a88f71d3ed97918ccdaa2e2db.zip gcc-5bbeea44287b696a88f71d3ed97918ccdaa2e2db.tar.gz gcc-5bbeea44287b696a88f71d3ed97918ccdaa2e2db.tar.bz2 | |
config.gcc: Add support for nocoma/prescott/pentium-m/pentium3m /pentium4m.
* config.gcc: Add support for nocoma/prescott/pentium-m/pentium3m
/pentium4m.
* i386.c (override_options): Add support for new CPUs.
* i386.h (TARGET_CPU_DEFAULT_NAMES): New names.
(TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_pentium4e): New
constants.
* invoke.texi: Extend documentation of -mtune/-march for new CPUs.
From-SVN: r78524
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 7e195f0..dcf11d7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -8105,11 +8105,20 @@ Intel PentiumMMX CPU based on Pentium core with MMX instruction set support. Intel PentiumPro CPU. @item pentium2 Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support. -@item pentium3 +@item pentium3, pentium3m Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set support. -@item pentium4 +@item pentium-m +Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set +support. Used by Centrino notebooks. +@item pentium4, pentium4m Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support. +@item prescott +Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction +set support. +@item nocona +Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE, +SSE2 and SSE3 instruction set support. @item k6 AMD K6 CPU with MMX instruction set support. @item k6-2, k6-3 |