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authorRichard Henderson <rth@redhat.com>2011-10-07 15:41:48 -0700
committerRichard Henderson <rth@gcc.gnu.org>2011-10-07 15:41:48 -0700
commit2205ed2513edc01b29a6a87983ccee7ccaf3b194 (patch)
tree485f14b72a67f60b5c3ee61f71970cc2727a2fda /gcc/doc
parent524857ec5dfc4184fa28dfc187bfd631e2f9a6aa (diff)
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Rename vshuffle/vec_shuffle to vec_perm.
* doc/extend.texi (__builtin_shuffle): Improve the description to include the modulus of the selector. Mention OpenCL. * doc/md.texi (vec_perm, vec_perm_const): Document named patterns. * tree.def (VEC_PERM_EXPR): Rename from VEC_SHUFFLE_EXPR. * genopinit.c (optabs): Rename vshuffle to vec_perm. * c-typeck.c (c_build_vec_perm_expr): Rename from c_build_vec_shuffle_expr. Update for name changes. * optabs.c (expand_vec_perm_expr_p): Rename from expand_vec_shuffle_expr_p. (expand_vec_perm_expr): Rename from expand_vec_shuffle_expr. * optabs.h (OTI_vec_perm): Rename from DOI_vshuffle. (vec_perm_optab): Rename from vshuffle_optab. * expr.c, gimple-pretty-print.c, gimple.c, gimplify.c, c-tree.h, c-parser.c, tree-cfg.c, tree-inline.c, tree-pretty-print.c, tree-ssa-operands.c, tree-vect-generic.c: Update for name changes. * config/i386/i386.c (ix86_expand_vec_perm): Rename from ix86_expand_vshuffle. * config/i386/i386-protos.h: Update. * config/i386/sse.md (VEC_PERM_AVX2): Rename from VSHUFFLE_AVX2. (vec_perm<VEC_PERM_AVX2>): Rename from vshuffle<VSHUFFLE_AVX2>. From-SVN: r179701
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/extend.texi37
-rw-r--r--gcc/doc/md.texi28
2 files changed, 42 insertions, 23 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index c3ebf09..11118ed 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -6586,16 +6586,18 @@ c = a == b; /* The result would be @{0,-1, 0,-1@} */
Vector shuffling is available using functions
@code{__builtin_shuffle (vec, mask)} and
-@code{__builtin_shuffle (vec0, vec1, mask)}. Both functions construct
-a permutation of elements from one or two vectors and return a vector
-of the same type as input vector(s). The mask is a vector of
-integer-typed elements. The size of each element of the mask must be
-the same as the size of each input vector element. The number of
-elements in input vector(s) and mask must be the same.
+@code{__builtin_shuffle (vec0, vec1, mask)}.
+Both functions construct a permutation of elements from one or two
+vectors and return a vector of the same type as the input vector(s).
+The @var{mask} is an integral vector with the same width (@var{W})
+and element count (@var{N}) as the output vector.
-The elements of the input vectors are numbered from left to right across
-one or both of the vectors. Each element in the mask specifies a number
-of element from the input vector(s). Consider the following example.
+The elements of the input vectors are numbered in memory ordering of
+@var{vec0} beginning at 0 and @var{vec1} beginning at @var{N}. The
+elements of @var{mask} are considered modulo @var{N} in the single-operand
+case and modulo @math{2*@var{N}} in the two-operand case.
+
+Consider the following example,
@smallexample
typedef int v4si __attribute__ ((vector_size (16)));
@@ -6610,6 +6612,9 @@ res = __builtin_shuffle (a, mask1); /* res is @{1,2,2,4@} */
res = __builtin_shuffle (a, b, mask2); /* res is @{1,5,3,6@} */
@end smallexample
+Note that @code{__builtin_shuffle} is intentionally semantically
+compatible with the OpenCL @code{shuffle} and @code{shuffle2} functions.
+
You can declare variables and use them in function calls and returns, as
well as in assignments and some casts. You can specify a vector type as
a return type for a function. Vector types can also be used as function
@@ -6620,20 +6625,6 @@ to and from other datatypes of the same size).
You cannot operate between vectors of different lengths or different
signedness without a cast.
-A port that supports hardware vector operations, usually provides a set
-of built-in functions that can be used to operate on vectors. For
-example, a function to add two vectors and multiply the result by a
-third could look like this:
-
-@smallexample
-v4si f (v4si a, v4si b, v4si c)
-@{
- v4si tmp = __builtin_addv4si (a, b);
- return __builtin_mulv4si (tmp, c);
-@}
-
-@end smallexample
-
@node Offsetof
@section Offsetof
@findex __builtin_offsetof
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 1aa8552..b61a99b 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -4028,6 +4028,34 @@ will be set to the value @var{op1} & @var{msk} | @var{op2} & ~@var{msk}
where @var{msk} is computed by element-wise evaluation of the vector
comparison with a truth value of all-ones and a false value of all-zeros.
+@cindex @code{vec_perm@var{m}} instruction pattern
+@item @samp{vec_perm@var{m}}
+Output a (variable) vector permutation. Operand 0 is the destination
+to receive elements from operand 1 and operand 2, which are of mode
+@var{m}. Operand 3 is the @dfn{selector}. It is an integral mode
+vector of the same width and number of elements as mode @var{m}.
+
+The input elements are numbered from 0 in operand 1 through
+@math{2*@var{N}-1} in operand 2. The elements of the selector must
+be computed modulo @math{2*@var{N}}. Note that if
+@code{rtx_equal_p(operand1, operand2)}, this can be implemented
+with just operand 1 and selector elements modulo @var{N}.
+
+@cindex @code{vec_perm_const@var{m}) instruction pattern
+@item @samp{vec_perm_const@var{m}}
+Like @samp{vec_perm} except that the permutation is a compile-time
+constant. That is, operand 3, the @dfn{selector}, is a @code{CONST_VECTOR}.
+
+Some targets cannot perform a permutation with a variable selector,
+but can efficiently perform a constant permutation. Further, the
+target hook @code{vec_perm_ok} is queried to determine if the
+specific constant permutation is available efficiently; the named
+pattern is never expanded without @code{vec_perm_ok} returning true.
+
+There is no need for a target to supply both @samp{vec_perm@var{m}}
+and @samp{vec_perm_const@var{m}} if the former can trivially implement
+the operation with, say, the vector constant loaded into a register.
+
@cindex @code{push@var{m}1} instruction pattern
@item @samp{push@var{m}1}
Output a push instruction. Operand 0 is value to push. Used only when