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authorJoseph Myers <joseph@codesourcery.com>2006-12-01 02:25:22 +0000
committerJoseph Myers <jsm28@gcc.gnu.org>2006-12-01 02:25:22 +0000
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re PR target/24036 ([e500] ICE in subreg_offset_representable_p, at rtlanal.c:3143)
2006-12-01 Joseph Myers <joseph@codesourcery.com> David Edelsohn <edelsohn@gnu.org> PR target/24036 * doc/tm.texi (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Document new target macros. * defaults.h (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Define. * config/i386/i386.h (HARD_REGNO_NREGS_HAS_PADDING, HARD_REGNO_NREGS_WITH_PADDING): Define. * rtlanal.c (subreg_regno_offset, subreg_offset_representable_p): Use new macros to detect modes with holes; do not look at integer units. (subreg_offset_representable_p): Check for and disallow cases where the modes use different numbers of bits from registers. * config/rs6000/rs6000.c (rs6000_emit_move): Handle TFmode constant for soft-float. (rs6000_hard_regno_nregs): Use UNITS_PER_FP_WORD for e500 GPRs containing doubles. (rs6000_split_multireg_move): Use DFmode reg_mode for TFmode moves in E500 double case. * config/rs6000/rs6000.md (movtf): Allow soft-float. (movtf_softfloat): New. Co-Authored-By: David Edelsohn <edelsohn@gnu.org> From-SVN: r119395
Diffstat (limited to 'gcc/doc/tm.texi')
-rw-r--r--gcc/doc/tm.texi27
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 2a21a58..634f5f1 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -1978,6 +1978,33 @@ definition of this macro is
@end smallexample
@end defmac
+@defmac HARD_REGNO_NREGS_HAS_PADDING (@var{regno}, @var{mode})
+A C expression that is nonzero if a value of mode @var{mode}, stored
+in memory, ends with padding that causes it to take up more space than
+in registers starting at register number @var{regno} (as determined by
+multiplying GCC's notion of the size of the register when containing
+this mode by the number of registers returned by
+@code{HARD_REGNO_NREGS}). By default this is zero.
+
+For example, if a floating-point value is stored in three 32-bit
+registers but takes up 128 bits in memory, then this would be
+nonzero.
+
+This macros only needs to be defined if there are cases where
+@code{subreg_regno_offset} and @code{subreg_offset_representable_p}
+would otherwise wrongly determine that a @code{subreg} can be
+represented by an offset to the register number, when in fact such a
+@code{subreg} would contain some of the padding not stored in
+registers and so not be representable.
+@end defmac
+
+@defmac HARD_REGNO_NREGS_WITH_PADDING (@var{regno}, @var{mode})
+For values of @var{regno} and @var{mode} for which
+@code{HARD_REGNO_NREGS_HAS_PADDING} returns nonzero, a C expression
+returning the greater number of registers required to hold the value
+including any padding. In the example above, the value would be four.
+@end defmac
+
@defmac REGMODE_NATURAL_SIZE (@var{mode})
Define this macro if the natural size of registers that hold values
of mode @var{mode} is not the word size. It is a C expression that