rtl.def (PREFETCH): New rtx code.

	* rtl.def (PREFETCH): New rtx code.
	* doc/rtl.texi (PREFETCH): Add documentation.
	* function.c (instantiate_virtual_regs_1): Handle PREFETCH rtx.
	* rtlanal.c (reg_referenced_p): Ditto.
	* sched-vis.c (print_exp):  Ditto.
	* ssa-dce.c (find_inherently_necessary):  Ditto.

From-SVN: r47580

1 files changed, 14 insertions, 0 deletions

diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index 8184894..c0c2cda 100644
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -2326,6 +2326,20 @@ are set up by branch shortening and hold a label with a minimum and a
 maximum address, respectively.  @var{flags} indicates the relative
 position of @var{base}, @var{min} and @var{max} to the containing insn
 and of @var{min} and @var{max} to @var{base}.  See rtl.def for details.
+
+@findex prefetch
+@item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
+Represents prefetch of memory at address @var{addr}.
+Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
+targets that do not support write prefetches should treat this as a normal
+prefetch.
+Operand @var{locality} specifies the amount of temporal locality; 0 if there
+is none or 1, 2, or 3 for increasing levels of temporal locality;
+targets that do not support locality hints should ignore this.
+
+This insn is used to minimize cache-miss latency by moving data into a
+cache before it is accessed.  It should use only non-faulting data prefetch
+instructions.
 @end table
 
 @node Incdec