aboutsummaryrefslogtreecommitdiff
path: root/gcc/doc/md.texi
diff options
context:
space:
mode:
authorRobin Dapp <rdapp@linux.ibm.com>2022-01-13 09:51:07 +0100
committerRobin Dapp <rdapp@linux.ibm.com>2022-01-13 20:05:18 +0100
commitb0e5163960eceab701a1a25dfa049e394fe5b3de (patch)
tree6f06da924ca25a3ea73e937f55eda28cbcdd51f7 /gcc/doc/md.texi
parent69561fc781aca3dea3aa4d5d562ef5a502965924 (diff)
downloadgcc-b0e5163960eceab701a1a25dfa049e394fe5b3de.zip
gcc-b0e5163960eceab701a1a25dfa049e394fe5b3de.tar.gz
gcc-b0e5163960eceab701a1a25dfa049e394fe5b3de.tar.bz2
vect: Add bias parameter for partial vectorization
This introduces a bias parameter for the len_load/len_store ifns as well as optabs that is meant to distinguish between Power and s390 variants. PowerPC's instructions require a bias of 0, while in s390's case vll/vstl do not support lengths of zero bytes and a bias of -1 must be used. gcc/ChangeLog: * internal-fn.c (expand_partial_load_optab_fn): Add bias. (expand_partial_store_optab_fn): Likewise. (internal_len_load_store_bias): New function. * internal-fn.h (VECT_PARTIAL_BIAS_UNSUPPORTED): New define. (internal_len_load_store_bias): New function. * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Set bias. (vect_set_loop_condition_partial_vectors): Add header_seq parameter. * tree-vect-loop.c (vect_verify_loop_lens): Verify bias. (vect_estimate_min_profitable_iters): Account for bias. (vect_get_loop_len): Add bias-adjusted length. * tree-vect-stmts.c (vectorizable_store): Use. (vectorizable_load): Use. * tree-vectorizer.h (struct rgroup_controls): Add bias-adjusted length. (LOOP_VINFO_PARTIAL_LOAD_STORE_BIAS): New macro. * config/rs6000/vsx.md: Use const0 bias predicate. * doc/md.texi: Document bias value.
Diffstat (limited to 'gcc/doc/md.texi')
-rw-r--r--gcc/doc/md.texi38
1 files changed, 28 insertions, 10 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 19e89ae..261933a 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5214,25 +5214,43 @@ This pattern is not allowed to @code{FAIL}.
@cindex @code{len_load_@var{m}} instruction pattern
@item @samp{len_load_@var{m}}
-Load the number of vector elements specified by operand 2 from memory
-operand 1 into vector register operand 0, setting the other elements of
+Load (operand 2 - operand 3) elements from vector memory operand 1
+into vector register operand 0, setting the other elements of
operand 0 to undefined values. Operands 0 and 1 have mode @var{m},
which must be a vector mode. Operand 2 has whichever integer mode the
-target prefers. If operand 2 exceeds the number of elements in mode
-@var{m}, the behavior is undefined. If the target prefers the length
-to be measured in bytes rather than elements, it should only implement
-this pattern for vectors of @code{QI} elements.
+target prefers. Operand 3 conceptually has mode @code{QI}.
+
+Operand 2 can be a variable or a constant amount. Operand 3 specifies a
+constant bias: it is either a constant 0 or a constant -1. The predicate on
+operand 3 must only accept the bias values that the target actually supports.
+GCC handles a bias of 0 more efficiently than a bias of -1.
+
+If (operand 2 - operand 3) exceeds the number of elements in mode
+@var{m}, the behavior is undefined.
+
+If the target prefers the length to be measured in bytes rather than
+elements, it should only implement this pattern for vectors of @code{QI}
+elements.
This pattern is not allowed to @code{FAIL}.
@cindex @code{len_store_@var{m}} instruction pattern
@item @samp{len_store_@var{m}}
-Store the number of vector elements specified by operand 2 from vector
-register operand 1 into memory operand 0, leaving the other elements of
+Store (operand 2 - operand 3) vector elements from vector register operand 1
+into memory operand 0, leaving the other elements of
operand 0 unchanged. Operands 0 and 1 have mode @var{m}, which must be
a vector mode. Operand 2 has whichever integer mode the target prefers.
-If operand 2 exceeds the number of elements in mode @var{m}, the behavior
-is undefined. If the target prefers the length to be measured in bytes
+Operand 3 conceptually has mode @code{QI}.
+
+Operand 2 can be a variable or a constant amount. Operand 3 specifies a
+constant bias: it is either a constant 0 or a constant -1. The predicate on
+operand 3 must only accept the bias values that the target actually supports.
+GCC handles a bias of 0 more efficiently than a bias of -1.
+
+If (operand 2 - operand 3) exceeds the number of elements in mode
+@var{m}, the behavior is undefined.
+
+If the target prefers the length to be measured in bytes
rather than elements, it should only implement this pattern for vectors
of @code{QI} elements.