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author | Kazu Hirata <kazu@gcc.gnu.org> | 2002-09-15 22:48:06 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2002-09-15 22:48:06 +0000 |
commit | 981f6289abaefa5aefb77cb6d06473c58d2e11d3 (patch) | |
tree | 28007d4004633363bcf80433f7aa22989ce61c32 /gcc/doc/md.texi | |
parent | 6578c58188414177d4ade5b13fe7f7800744acb0 (diff) | |
download | gcc-981f6289abaefa5aefb77cb6d06473c58d2e11d3.zip gcc-981f6289abaefa5aefb77cb6d06473c58d2e11d3.tar.gz gcc-981f6289abaefa5aefb77cb6d06473c58d2e11d3.tar.bz2 |
ChangeLog: Follow spelling conventions.
* ChangeLog: Follow spelling conventions.
* ChangeLog.0: Likewise.
* ChangeLog.1: Likewise.
* ChangeLog.2: Likewise.
* ChangeLog.4: Likewise.
* ChangeLog.6: Likewise.
* config.gcc: Likewise.
* dwarfout.c: Likewise.
* reload1.c: Likewise.
* simplify-rtx.c: Likewise.
* unwind-sjlj.c: Likewise.
* config/avr/avr.h: Likewise.
* config/d30v/d30v.h: Likewise.
* config/frv/frv.c: Likewise.
* config/frv/frv.h: Likewise.
* config/ip2k/ip2k.h: Likewise.
* config/m88k/m88k-move.sh: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/stormy16/stormy16.h: Likewise.
* doc/extend.texi: Likewise.
* doc/interface.texi: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
* doc/rtl.texi: Likewise.
* doc/tm.texi: Likewise.
* doc/trouble.texi: Likewise.
* ginclude/float.h: Likewise.
* treelang/treelang.texi: Likewise.
From-SVN: r57179
Diffstat (limited to 'gcc/doc/md.texi')
-rw-r--r-- | gcc/doc/md.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 3670341..db64075 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3480,7 +3480,7 @@ multiple condition registers, use a pseudo register. @findex next_cc0_user On some machines, the type of branch instruction generated may depend on the way the condition code was produced; for example, on the 68k and -Sparc, setting the condition code directly from an add or subtract +SPARC, setting the condition code directly from an add or subtract instruction does not clear the overflow bit the way that a test instruction does, so a different branch instruction must be used for some conditional branches. For machines that use @code{(cc0)}, the set @@ -3499,7 +3499,7 @@ different formats of the condition code register. Registers used to store the condition code value should have a mode that is in class @code{MODE_CC}. Normally, it will be @code{CCmode}. If additional modes are required (as for the add example mentioned above in -the Sparc), define the macro @code{EXTRA_CC_MODES} to list the +the SPARC), define the macro @code{EXTRA_CC_MODES} to list the additional modes required (@pxref{Condition Code}). Also define @code{SELECT_CC_MODE} to choose a mode given an operand of a compare. @@ -3511,7 +3511,7 @@ be specified at that time. If the cases that require different modes would be made by instruction combination, the macro @code{SELECT_CC_MODE} determines which machine mode should be used for the comparison result. The patterns should be -written using that mode. To support the case of the add on the Sparc +written using that mode. To support the case of the add on the SPARC discussed above, we have the pattern @smallexample @@ -3525,7 +3525,7 @@ discussed above, we have the pattern "@dots{}") @end smallexample -The @code{SELECT_CC_MODE} macro on the Sparc returns @code{CC_NOOVmode} +The @code{SELECT_CC_MODE} macro on the SPARC returns @code{CC_NOOVmode} for comparisons whose argument is a @code{plus}. @node Looping Patterns |