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| author | David S. Miller <davem@davemloft.net> | 2011-09-05 16:00:53 +0000 |
|---|---|---|
| committer | David S. Miller <davem@gcc.gnu.org> | 2011-09-05 09:00:53 -0700 |
| commit | 3e64c239dd9a97ce13c6c69d42247d0187854f09 (patch) | |
| tree | 567a4e123c0f1e18e9b8b74dc138f6b16396f5ba /gcc/doc/invoke.texi | |
| parent | 0913b2d64ed9926d38d1de2370df11b0f98a49e0 (diff) | |
| download | gcc-3e64c239dd9a97ce13c6c69d42247d0187854f09.zip gcc-3e64c239dd9a97ce13c6c69d42247d0187854f09.tar.gz gcc-3e64c239dd9a97ce13c6c69d42247d0187854f09.tar.bz2 | |
sparc-opts.h (PROCESSOR_NIAGARA3, [...]): New.
* config/sparc/sparc-opts.h (PROCESSOR_NIAGARA3,
PROCESSOR_NIAGARA4): New.
* config/sparc/sparc.opt: Handle new processor types.
* config/sparc/sparc.md: Add to "cpu" attribute.
* config/sparc/sparc.h (TARGET_CPU_niagara3,
TARGET_CPU_niagara4): New, treat as niagara2.
* config/sparc/linux64.h: Handle niagara3 and niagara4
like niagara2.
* config/sparc/sol2.h: Likewise.
* config/sparc/niagara2.md: Schedule niagara3 like
niagara2.
* config/sparc/sparc.c (sparc_option_override): Add
niagara3 and niagara4 handling.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
(sparc_use_sched_lookahead): Likewise.
(sparc_issue_rate): Likewise.
(sparc_register_move_cost): Likewise.
* config/sparc/driver-sparc.c (cpu_names): Use niagara3
and niagara4 as appropriate.
* doc/invoke.texi: Document new processor types.
From-SVN: r178554
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 66d9fc5..c5b19eb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -17283,7 +17283,8 @@ for machine type @var{cpu_type}. Supported values for @var{cpu_type} are @samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, -@samp{ultrasparc3}, @samp{niagara} and @samp{niagara2}. +@samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, @samp{niagara3}, +and @samp{niagara4}. Native Solaris and Linux toolchains also support the value @samp{native}, which selects the best architecture option for the host processor. @@ -17302,7 +17303,7 @@ implementations. v8: supersparc, hypersparc, leon sparclite: f930, f934, sparclite86x sparclet: tsc701 - v9: ultrasparc, ultrasparc3, niagara, niagara2 + v9: ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4 @end smallexample By default (unless configured otherwise), GCC generates code for the V7 @@ -17341,7 +17342,10 @@ optimizes it for the Sun UltraSPARC I/II/IIi chips. With Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With @option{-mcpu=niagara}, the compiler additionally optimizes it for Sun UltraSPARC T1 chips. With @option{-mcpu=niagara2}, the compiler -additionally optimizes it for Sun UltraSPARC T2 chips. +additionally optimizes it for Sun UltraSPARC T2 chips. With +@option{-mcpu=niagara3}, the compiler additionally optimizes it for Sun +UltraSPARC T3 chips. With @option{-mcpu=niagara4}, the compiler +additionally optimizes it for Sun UltraSPARC T4 chips. @item -mtune=@var{cpu_type} @opindex mtune @@ -17354,8 +17358,8 @@ The same values for @option{-mcpu=@var{cpu_type}} can be used for that select a particular CPU implementation. Those are @samp{cypress}, @samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3}, -@samp{niagara}, and @samp{niagara2}. With native Solaris and Linux -toolchains, @samp{native} can also be used. +@samp{niagara}, @samp{niagara2}, @samp{niagara3} and @samp{niagara4}. With +native Solaris and Linux toolchains, @samp{native} can also be used. @item -mv8plus @itemx -mno-v8plus |