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| author | Lulu Cheng <chenglulu@loongson.cn> | 2024-04-09 11:48:13 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2024-04-16 11:04:02 +0800 |
| commit | 46d914d0e0b7e982627edb285c41c67cc4e640ac (patch) | |
| tree | 561254e5eaa6e45a8c0b883c01c3fdf77e997c11 /gcc/doc/invoke.texi | |
| parent | e1d4c8e44a2348e91befb4e7ef25ffe73c74db41 (diff) | |
| download | gcc-46d914d0e0b7e982627edb285c41c67cc4e640ac.zip gcc-46d914d0e0b7e982627edb285c41c67cc4e640ac.tar.gz gcc-46d914d0e0b7e982627edb285c41c67cc4e640ac.tar.bz2 | |
LoongArch: Add indexes for some compilation options.
gcc/ChangeLog:
* config/loongarch/loongarch.opt.urls: Regenerate.
* config/mn10300/mn10300.opt.urls: Likewise.
* config/msp430/msp430.opt.urls: Likewise.
* config/nds32/nds32-elf.opt.urls: Likewise.
* config/nds32/nds32-linux.opt.urls: Likewise.
* config/nds32/nds32.opt.urls: Likewise.
* config/pru/pru.opt.urls: Likewise.
* config/riscv/riscv.opt.urls: Likewise.
* config/rx/rx.opt.urls: Likewise.
* config/sh/sh.opt.urls: Likewise.
* config/sparc/sparc.opt.urls: Likewise.
* doc/invoke.texi: Add indexes for some compilation options.
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e328558..7e517b8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -27011,6 +27011,7 @@ section (on some targets). The default value is 0. Inline all block moves (such as calls to @code{memcpy} or structure copies) less than or equal to @var{n} bytes. The default value of @var{n} is 1024. +@opindex mcmodel @item -mcmodel=@var{code-model} Set the code model to one of: @table @samp @@ -27073,6 +27074,8 @@ kernels, executables linked with @option{-static} or @option{-static-pie}. @option{-mdirect-extern-access} is not compatible with @option{-fPIC} or @option{-fpic}. +@opindex mrelax +@opindex mno-relax @item -mrelax @itemx -mno-relax Take (do not take) advantage of linker relaxations. If @@ -27085,6 +27088,8 @@ option and the conditional branch relaxation (it's required or the assembly code outputted by GCC may be rejected by the assembler because of a relocation overflow), @option{-mno-relax} otherwise. +@opindex mpass-mrelax-to-as +@opindex mno-pass-mrelax-to-as @item -mpass-mrelax-to-as @itemx -mno-pass-mrelax-to-as Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option @@ -27201,7 +27206,7 @@ Use traditional TLS. This is the default. Use TLS descriptors. @end table -@item loongarch-vect-unroll-limit +@item --param loongarch-vect-unroll-limit=@var{n} The vectorizer will use available tuning information to determine whether it would be beneficial to unroll the main vectorized loop and by how much. This parameter set's the upper bound of how much the vectorizer will unroll the main |