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| author | David Daney <ddaney@avtrex.com> | 2007-09-11 20:14:51 +0000 |
|---|---|---|
| committer | David Daney <daney@gcc.gnu.org> | 2007-09-11 20:14:51 +0000 |
| commit | 66471b4708b84db82570b9747fb4e157c23f9804 (patch) | |
| tree | 14dfcb7d16ebfd463a4f9ecab96e3573379f51d0 /gcc/doc/invoke.texi | |
| parent | fa89b6ecba4ce9448b82a21f91b360eacf57bc72 (diff) | |
| download | gcc-66471b4708b84db82570b9747fb4e157c23f9804.zip gcc-66471b4708b84db82570b9747fb4e157c23f9804.tar.gz gcc-66471b4708b84db82570b9747fb4e157c23f9804.tar.bz2 | |
invoke.texi: Document new MIPS -mllsc and -mno-llsc options.
* doc/invoke.texi: Document new MIPS -mllsc and -mno-llsc options.
* doc/install.texi: Document new --with-llsc and --without-llsc
options.
* config.gcc: Handle --with-llsc and --without-llsc configure options.
* config/mips/mips.md (sync, memory_barrier): Wrap sync instrunction
in %| and %- operand codes. Depend on GENERATE_SYNC instead of
ISA_HAS_SYNC.
(sync_compare_and_swap<mode>, sync_add<mode>, sync_sub<mode>,
sync_old_add<mode>, sync_old_sub<mode>, sync_new_add<mode>,
sync_new_sub<mode>, sync_<optab><mode>, sync_old_<optab><mode>,
sync_new_<optab><mode>, sync_nand<mode>, sync_old_nand<mode>,
sync_new_nand<mode>, sync_lock_test_and_set<mode>): Depend on
GENERATE_LL_SC instead of ISA_HAS_LL_SC.
* config/mips/mips.opt (mllsc): New option.
* config/mips/mips.c (mips_llsc): Define variable.
(mips_handle_option): Handle mllsc option.
(override_options): Set mips_print_operand_punct for '|' and '-'.
(print_operand): Add new %| and %- operand codes.
* config/mips/mips.h (mips_llsc_setting): New enum type.
(mips_llsc): Declare.
(OPTION_DEFAULT_SPECS): Add llsc handling.
(GENERATE_SYNC): New macro.
(GENERATE_LL_SC): New macro.
(MIPS_COMPARE_AND_SWAP, MIPS_SYNC_OP, MIPS_SYNC_OLD_OP,
MIPS_SYNC_NEW_OP, MIPS_SYNC_NAND, MIPS_SYNC_OLD_NAND,
MIPS_SYNC_NEW_NAND, MIPS_SYNC_EXCHANGE): Wrap instructions
in %| and %- operand codes.
From-SVN: r128392
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 7413abd..f916b50 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -627,7 +627,7 @@ Objective-C and Objective-C++ Dialects}. -msingle-float -mdouble-float -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol -msmartmips -mno-smartmips @gol -mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol --mips3d -mno-mips3d -mmt -mno-mt @gol +-mips3d -mno-mips3d -mmt -mno-mt -mllsc -mno-llsc @gol -mlong64 -mlong32 -msym32 -mno-sym32 @gol -G@var{num} -mlocal-sdata -mno-local-sdata @gol -mextern-sdata -mno-extern-sdata -mgpopt -mno-gopt @gol @@ -11772,6 +11772,22 @@ operations. Assume that the floating-point coprocessor supports double-precision operations. This is the default. +@item -mllsc +@itemx -mno-llsc +@opindex mllsc +@opindex mno-llsc +Use (do not use) @samp{ll}, @samp{sc}, and @samp{sync} instructions to +implement atomic memory built-in functions. When neither option is +specified, GCC will use the instructions if the target architecture +supports them. + +@option{-mllsc} is useful if the runtime environment can emulate the +instructions and @option{-mno-llsc} can be useful when compiling for +nonstandard ISAs. You can make either option the default by +configuring GCC with @option{--with-llsc} and @option{--without-llsc} +respectively. @option{--with-llsc} is the default for some +configurations; see the installation documentation for details. + @item -mdsp @itemx -mno-dsp @opindex mdsp |