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authorAndreas Krebbel <Andreas.Krebbel@de.ibm.com>2013-06-27 07:44:11 +0000
committerAndreas Krebbel <krebbel@gcc.gnu.org>2013-06-27 07:44:11 +0000
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s390.c: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to...
2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. (struct machine_function): Add tbegin_p. (s390_canonicalize_comparison): Fold CC mode compares to conditional jump if possible. (s390_emit_jump): Return the emitted jump. (s390_branch_condition_mask, s390_branch_condition_mnemonic): Handle CCRAWmode compares. (s390_option_override): Default to -mhtm if available. (s390_reg_clobbered_rtx): Handle floating point regs as well. (s390_regs_ever_clobbered): Use s390_regs_ever_clobbered also for FPRs instead of df_regs_ever_live_p. (s390_optimize_nonescaping_tx): New function. (s390_init_frame_layout): Extend clobbered_regs array to cover FPRs as well. (s390_emit_prologue): Call s390_optimize_nonescaping_tx. (s390_expand_tbegin): New function. (enum s390_builtin): New enum definition. (code_for_builtin): New array definition. (s390_init_builtins): New function. (s390_expand_builtin): New function. (TARGET_INIT_BUILTINS): Define. (TARGET_EXPAND_BUILTIN): Define. * common/config/s390/s390-common.c (processor_flags_table): Add PF_TX. * config/s390/predicates.md (s390_comparison): Handle CCRAWmode. (s390_alc_comparison): Likewise. * config/s390/s390-modes.def: Add CCRAWmode. * config/s390/s390.h (processor_flags): Add PF_TX. (TARGET_CPU_HTM): Define macro. (TARGET_HTM): Define macro. (TARGET_CPU_CPP_BUILTINS): Define __HTM__ for htm. * config/s390/s390.md: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. (UNSPECV_TBEGIN, UNSPECV_TBEGINC, UNSPECV_TEND, UNSPECV_TABORT) (UNSPECV_ETND, UNSPECV_NTSTG, UNSPECV_PPA): New unspecv enum values. (TBEGIN_MASK, TBEGINC_MASK): New constants. ("*cc_to_int"): Move up. ("*mov<mode>cc", "*cjump_64", "*cjump_31"): Accept integer constants other than 0. ("*ccraw_to_int"): New insn and splitter definition. ("tbegin", "tbegin_nofloat", "tbegin_retry") ("tbegin_retry_nofloat", "tbeginc", "tend", "tabort") ("tx_assist"): New expander. ("tbegin_1", "tbegin_nofloat_1", "*tbeginc_1", "*tend_1") ("*tabort_1", "etnd", "ntstg", "*ppa"): New insn definition. * config/s390/s390.opt: Add -mhtm option. * config/s390/s390-protos.h (s390_emit_jump): Add return type. * config/s390/htmxlintrin.h: New file. * config/s390/htmintrin.h: New file. * config/s390/s390intrin.h: New file. * doc/extend.texi: Document htm builtins. * config.gcc: Add the new header files to extra_headers. 2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gcc.target/s390/htm-1.c: New file. * gcc.target/s390/htm-nofloat-1.c: New file. * gcc.target/s390/htm-xl-intrin-1.c: New file. 2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/target.h: Include htmintrin.h. (_HTM_ITM_RETRIES): New macro definition. (htm_available, htm_init, htm_begin, htm_begin_success) (htm_commit, htm_abort, htm_abort_should_retry): New functions. From-SVN: r200454
Diffstat (limited to 'gcc/doc/extend.texi')
-rw-r--r--gcc/doc/extend.texi115
1 files changed, 115 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index e50f2a4..1c85a3e 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -8847,6 +8847,7 @@ instructions, but allow the compiler to schedule those calls.
* PowerPC Built-in Functions::
* PowerPC AltiVec/VSX Built-in Functions::
* RX Built-in Functions::
+* S/390 System z Built-in Functions::
* SH Built-in Functions::
* SPARC VIS Built-in Functions::
* SPU Built-in Functions::
@@ -14422,6 +14423,120 @@ bit in the processor status word.
Generates the @code{wait} machine instruction.
@end deftypefn
+@node S/390 System z Built-in Functions
+@subsection S/390 System z Built-in Functions
+@deftypefn {Built-in Function} int __builtin_tbegin (void*)
+Generates the @code{tbegin} machine instruction starting a
+non-constraint hardware transaction. If the parameter is non-NULL the
+memory area is used to store the transaction diagnostic buffer and
+will be passed as first operand to @code{tbegin}. This buffer can be
+defined using the @code{struct __htm_tdb} C struct defined in
+@code{htmintrin.h} and must reside on a double-word boundary. The
+second tbegin operand is set to @code{0xff0c}. This enables
+save/restore of all GPRs and disables aborts for FPR and AR
+manipulations inside the transaction body. The condition code set by
+the tbegin instruction is returned as integer value. The tbegin
+instruction by definition overwrites the content of all FPRs. The
+compiler will generate code which saves and restores the FPRs. For
+soft-float code it is recommended to used the @code{*_nofloat}
+variant. In order to prevent a TDB from being written it is required
+to pass an constant zero value as parameter. Passing the zero value
+through a variable is not sufficient. Although modifications of
+access registers inside the transaction will not trigger an
+transaction abort it is not supported to actually modify them. Access
+registers do not get saved when entering a transaction. They will have
+undefined state when reaching the abort code.
+@end deftypefn
+
+Macros for the possible return codes of tbegin are defined in the
+@code{htmintrin.h} header file:
+
+@table @code
+@item _HTM_TBEGIN_STARTED
+@code{tbegin} has been executed as part of normal processing. The
+transaction body is supposed to be executed.
+@item _HTM_TBEGIN_INDETERMINATE
+The transaction was aborted due to an indeterminate condition which
+might be persistent.
+@item _HTM_TBEGIN_TRANSIENT
+The transaction aborted due to a transient failure. The transaction
+should be re-executed in that case.
+@item _HTM_TBEGIN_PERSISTENT
+The transaction aborted due to a persistent failure. Re-execution
+under same circumstances will not be productive.
+@end table
+
+@defmac _HTM_FIRST_USER_ABORT_CODE
+The @code{_HTM_FIRST_USER_ABORT_CODE} defined in @code{htmintrin.h}
+specifies the first abort code which can be used for
+@code{__builtin_tabort}. Values below this threshold are reserved for
+machine use.
+@end defmac
+
+@deftp {Data type} {struct __htm_tdb}
+The @code{struct __htm_tdb} defined in @code{htmintrin.h} describes
+the structure of the transaction diagnostic block as specified in the
+Principles of Operation manual chapter 5-91.
+@end deftp
+
+@deftypefn {Built-in Function} int __builtin_tbegin_nofloat (void*)
+Same as @code{__builtin_tbegin} but without FPR saves and restores.
+Using this variant in code making use of FPRs will leave the FPRs in
+undefined state when entering the transaction abort handler code.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_tbegin_retry (void*, int)
+In addition to @code{__builtin_tbegin} a loop for transient failures
+is generated. If tbegin returns a condition code of 2 the transaction
+will be retried as often as specified in the second argument. The
+perform processor assist instruction is used to tell the CPU about the
+number of fails so far.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_tbegin_retry_nofloat (void*, int)
+Same as @code{__builtin_tbegin_retry} but without FPR saves and
+restores. Using this variant in code making use of FPRs will leave
+the FPRs in undefined state when entering the transaction abort
+handler code.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_tbeginc (void)
+Generates the @code{tbeginc} machine instruction starting a constraint
+hardware transaction. The second operand is set to @code{0xff08}.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_tend (void)
+Generates the @code{tend} machine instruction finishing a transaction
+and making the changes visible to other threads. The condition code
+generated by tend is returned as integer value.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_tabort (int)
+Generates the @code{tabort} machine instruction with the specified
+abort code. Abort codes from 0 through 255 are reserved and will
+result in an error message.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_tx_assist (int)
+Generates the @code{ppa rX,rY,1} machine instruction. Where the
+integer parameter is loaded into rX and a value of zero is loaded into
+rY. The integer parameter specifies the number of times the
+transaction repeatedly aborted.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_tx_nesting_depth (void)
+Generates the @code{etnd} machine instruction. The current nesting
+depth is returned as integer value. For a nesting depth of 0 the code
+is not executed as part of an transaction.
+@end deftypefn
+
+@deftypefn {Built-in Function} void __builtin_non_tx_store (unsigned long long *, unsigned long long)
+
+Generates the @code{ntstg} machine instruction. The second argument
+is written to the first arguments location. The store operation will
+not be rolled-back in case of an transaction abort.
+@end deftypefn
+
@node SH Built-in Functions
@subsection SH Built-in Functions
The following built-in functions are supported on the SH1, SH2, SH3 and SH4