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author | Haochen Jiang <haochen.jiang@intel.com> | 2023-11-20 15:47:44 +0800 |
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committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-11-20 15:47:44 +0800 |
commit | 2f8f7ee2db82a315f9faf8b306d6203ca7f7b002 (patch) | |
tree | 680cd656bb6bea0b28dacf6d6a57d83d5e57cab4 /gcc/doc/extend.texi | |
parent | e85c596ae2d1e5f5b769b5af4c0a8e7d055e40d7 (diff) | |
download | gcc-2f8f7ee2db82a315f9faf8b306d6203ca7f7b002.zip gcc-2f8f7ee2db82a315f9faf8b306d6203ca7f7b002.tar.gz gcc-2f8f7ee2db82a315f9faf8b306d6203ca7f7b002.tar.bz2 |
Initial support for AVX10.1
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features):
Add avx10_set and version and detect avx10.1.
(cpu_indicator_init): Handle avx10.1-512.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AVX10_1_256_SET): New.
(OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
(OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
(OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
(OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
(ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
Add indicator for explicit no-avx512 and no-avx10.1 options.
* common/config/i386/i386-cpuinfo.h (enum processor_features):
Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
AVX10_1_256 and AVX10_1_512.
* config/i386/cpuid.h (bit_AVX10): New.
(bit_AVX10_256): Ditto.
(bit_AVX10_512): Ditto.
* config/i386/driver-i386.cc (check_avx10_avx512_features): New.
(host_detect_local_cpu): Do not append "-mno-" options under
specific scenarios to avoid emitting a warning.
* config/i386/i386-isa.def
(EVEX512): Add DEF_PTA(EVEX512).
(AVX10_1_256): Add DEF_PTA(AVX10_1_256).
(AVX10_1_512): Add DEF_PTA(AVX10_1_512).
* config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
-mavx10.1-512.
(ix86_function_specific_save): Save explicit no indicator.
(ix86_function_specific_restore): Restore explicit no indicator.
(ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
avx10.1-512.
(ix86_valid_target_attribute_tree): Handle avx512 function
attributes with avx10.1 command line option.
(ix86_option_override_internal): Handle AVX10.1 options.
* config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
machines.
* config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
-mavx10.1-512.
* doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
* doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
* doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
and avx10.1-512.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_1-1.c: New test.
* gcc.target/i386/avx10_1-10.c: Ditto.
* gcc.target/i386/avx10_1-11.c: Ditto.
* gcc.target/i386/avx10_1-12.c: Ditto.
* gcc.target/i386/avx10_1-13.c: Ditto.
* gcc.target/i386/avx10_1-14.c: Ditto.
* gcc.target/i386/avx10_1-15.c: Ditto.
* gcc.target/i386/avx10_1-16.c: Ditto.
* gcc.target/i386/avx10_1-17.c: Ditto.
* gcc.target/i386/avx10_1-18.c: Ditto.
* gcc.target/i386/avx10_1-19.c: Ditto.
* gcc.target/i386/avx10_1-2.c: Ditto.
* gcc.target/i386/avx10_1-20.c: Ditto.
* gcc.target/i386/avx10_1-21.c: Ditto.
* gcc.target/i386/avx10_1-22.c: Ditto.
* gcc.target/i386/avx10_1-23.c: Ditto.
* gcc.target/i386/avx10_1-3.c: Ditto.
* gcc.target/i386/avx10_1-4.c: Ditto.
* gcc.target/i386/avx10_1-5.c: Ditto.
* gcc.target/i386/avx10_1-6.c: Ditto.
* gcc.target/i386/avx10_1-7.c: Ditto.
* gcc.target/i386/avx10_1-8.c: Ditto.
* gcc.target/i386/avx10_1-9.c: Ditto.
Diffstat (limited to 'gcc/doc/extend.texi')
-rw-r--r-- | gcc/doc/extend.texi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 8293a7b..3169acd 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -7341,6 +7341,21 @@ Enable/disable the generation of the SM4 instructions. @itemx no-usermsr Enable/disable the generation of the USER_MSR instructions. +@cindex @code{target("avx10.1")} function attribute, x86 +@item avx10.1 +@itemx no-avx10.1 +Enable/disable the generation of the AVX10.1 instructions. + +@cindex @code{target("avx10.1-256")} function attribute, x86 +@item avx10.1-256 +@itemx no-avx10.1-256 +Enable/disable the generation of the AVX10.1 instructions. + +@cindex @code{target("avx10.1-512")} function attribute, x86 +@item avx10.1-512 +@itemx no-avx10.1-512 +Enable/disable the generation of the AVX10.1 512 bit instructions. + @cindex @code{target("cld")} function attribute, x86 @item cld @itemx no-cld |