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authorXiao Zeng <zengxiao@eswincomputing.com>2023-12-15 12:24:53 -0700
committerJeff Law <jlaw@ventanamicro.com>2023-12-15 12:25:30 -0700
commit1ddf65c5fc6ba7cf5826e1c02c569c923a541c09 (patch)
tree1f0f57660327224c90186043842d9aee5f4845f6 /gcc/defaults.h
parent7d7a480eedf0a195318d0fce2c9c57acae43ec9d (diff)
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[PATCH] RISC-V: Add Zvfbfmin extension to the -march= option
This patch would like to add new sub extension (aka Zvfbfmin) to the -march= option. It introduces a new data type BF16. Depending on different usage scenarios, the Zvfbfmin extension may depend on 'V' or 'Zve32f'. This patch only implements dependencies in scenario of Embedded Processor. In scenario of Application Processor, it is necessary to explicitly indicate the dependent 'V' extension. You can locate more information about Zvfbfmin from below spec doc. https://github.com/riscv/riscv-bfloat16/releases/download/20231027/riscv-bfloat16.pdf gcc/ChangeLog: * common/config/riscv/riscv-common.cc: (riscv_implied_info): Add zvfbfmin item. (riscv_ext_version_table): Ditto. (riscv_ext_flag_table): Ditto. * config/riscv/riscv.opt: (MASK_ZVFBFMIN): New macro. (MASK_VECTOR_ELEN_BF_16): Ditto. (TARGET_ZVFBFMIN): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-31.c: New test. * gcc.target/riscv/arch-32.c: New test. * gcc.target/riscv/predef-32.c: New test. * gcc.target/riscv/predef-33.c: New test.
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