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| author | Mary Bennett <mary.bennett@embecosm.com> | 2023-12-15 14:59:03 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2023-12-15 15:00:52 -0700 |
| commit | 14876d6aa73b9e9385313c857ab6f399e4823bf8 (patch) | |
| tree | 7e16451b2a8d45c0e89709b3b1e4173a597c874b /gcc/defaults.h | |
| parent | 723d62feae96fb528d5faf715fe2ff47233670a0 (diff) | |
| download | gcc-14876d6aa73b9e9385313c857ab6f399e4823bf8.zip gcc-14876d6aa73b9e9385313c857ab6f399e4823bf8.tar.gz gcc-14876d6aa73b9e9385313c857ab6f399e4823bf8.tar.bz2 | |
[PATCH v4 1/3] RISC-V: Add support for XCVelw extension in CV32E40P
Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md
Contributors:
Mary Bennett <mary.bennett@embecosm.com>
Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Pietra Ferreira <pietra.ferreira@embecosm.com>
Charlie Keaney
Jessica Mills
Craig Blackmore <craig.blackmore@embecosm.com>
Simon Cook <simon.cook@embecosm.com>
Jeremy Bennett <jeremy.bennett@embecosm.com>
Helene Chelin <helene.chelin@embecosm.com>
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Add XCVelw.
* config/riscv/corev.def: Likewise.
* config/riscv/corev.md: Likewise.
* config/riscv/riscv-builtins.cc (AVAIL): Likewise.
* config/riscv/riscv-ftypes.def: Likewise.
* config/riscv/riscv.opt: Likewise.
* doc/extend.texi: Add XCVelw builtin documentation.
* doc/sourcebuild.texi: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/cv-elw-elw-compile-1.c: Create test for cv.elw.
* lib/target-supports.exp: Add proc for the XCVelw extension.
Diffstat (limited to 'gcc/defaults.h')
0 files changed, 0 insertions, 0 deletions