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authorWilco Dijkstra <wilco.dijkstra@arm.com>2022-12-12 15:44:03 +0000
committerWilco Dijkstra <wilco.dijkstra@arm.com>2022-12-12 16:31:31 +0000
commit2d7c73ee5eae47eee16ddab3df2928ff5a7dd89c (patch)
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parent4d9db4bdd458a4b526f59e4bc5bbd549d3861cea (diff)
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AArch64: Enable TARGET_CONST_ANCHOR
Enable TARGET_CONST_ANCHOR to allow complex constants to be created via immediate add/sub. Use a 24-bit range as that enables a 3 or 4-instruction immediate to be replaced by 2 add/sub instructions. Fix the costing of add/sub to support 24-bit and 12-bit shifted immediates. The generated code for the testcase is now the same or better than LLVM. It also results in a small codesize reduction on SPEC. gcc/ * config/aarch64/aarch64.cc (aarch64_rtx_costs): Add correct costs for 24-bit and 12-bit shifted immediate add/sub. (TARGET_CONST_ANCHOR): Define. * config/aarch64/predicates.md (aarch64_pluslong_immediate): Fix range check. gcc/testsuite/ * gcc.target/aarch64/movk_3.c: New test.
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