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authorTakayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>2022-06-10 13:19:32 +0900
committerMax Filippov <jcmvbkbc@gmail.com>2022-06-11 13:15:30 -0700
commitccd02e734e0f1742629403b46e5b1c650b00fd65 (patch)
tree132b6c5a54d45fb302361a7144a62e7ca6826e1f /gcc/d/expr.cc
parentfddf0e1057fe24eff0d894fbc2959b4086464a96 (diff)
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xtensa: Improve instruction cost estimation and suggestion
This patch implements a new target-specific relative RTL insn cost function because of suboptimal cost estimation by default, and fixes several "length" insn attributes (related to the cost estimation). And also introduces a new machine-dependent option "-mextra-l32r-costs=" that tells implementation-specific InstRAM/ROM access penalty for L32R instruction to the compiler (in clock-cycle units, 0 by default). gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_rtx_costs): Correct wrong case for ABS and NEG, add missing case for BSWAP and CLRSB, and double the costs for integer divisions using libfuncs if optimizing for speed, in order to take advantage of fast constant division by multiplication. (TARGET_INSN_COST): New macro definition. (xtensa_is_insn_L32R_p, xtensa_insn_cost): New functions for calculating relative costs of a RTL insns, for both of speed and size. * config/xtensa/xtensa.md (return, nop, trap): Correct values of the attribute "length" that depends on TARGET_DENSITY. (define_asm_attributes, blockage, frame_blockage): Add missing attributes. * config/xtensa/xtensa.opt (-mextra-l32r-costs=): New machine- dependent option, however, preparatory work for now.
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