diff options
| author | Greg McGary <gkm@rivosinc.com> | 2024-03-03 14:49:49 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2024-03-03 14:50:34 -0700 |
| commit | 24975a9195743e8eb4ca213f35b9221d4eeb6b59 (patch) | |
| tree | 0b66a8ee8cd9d6da2af6d894b2100a3b3728207d /gcc/d/expr.cc | |
| parent | 5cc61212b71a3e1264c8a9c0c35e13474be04f87 (diff) | |
| download | gcc-24975a9195743e8eb4ca213f35b9221d4eeb6b59.zip gcc-24975a9195743e8eb4ca213f35b9221d4eeb6b59.tar.gz gcc-24975a9195743e8eb4ca213f35b9221d4eeb6b59.tar.bz2 | |
[PATCH] combine: Don't simplify paradoxical SUBREG on WORD_REGISTER_OPERATIONS [PR113010]
The sign-bit-copies of a sign-extending load cannot be known until runtime on
WORD_REGISTER_OPERATIONS targets, except in the case of a zero-extending MEM
load. See the fix for PR112758.
gcc/
PR rtl-optimization/113010
* combine.cc (simplify_comparison): Simplify a SUBREG on
WORD_REGISTER_OPERATIONS targets only if it is a zero-extending
MEM load.
gcc/testsuite
* gcc.c-torture/execute/pr113010.c: New test.
Diffstat (limited to 'gcc/d/expr.cc')
0 files changed, 0 insertions, 0 deletions