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| author | Jim Wilson <wilson@gcc.gnu.org> | 1996-06-07 19:36:34 -0700 |
|---|---|---|
| committer | Jim Wilson <wilson@gcc.gnu.org> | 1996-06-07 19:36:34 -0700 |
| commit | 2d917903294885f0f65accf65a231e89a4b2778f (patch) | |
| tree | 9a278383f95b70ca22082627007203ee9d7af526 /gcc/cse.c | |
| parent | 44803a5b367cca38aaeb345bd49ed27ab795e918 (diff) | |
| download | gcc-2d917903294885f0f65accf65a231e89a4b2778f.zip gcc-2d917903294885f0f65accf65a231e89a4b2778f.tar.gz gcc-2d917903294885f0f65accf65a231e89a4b2778f.tar.bz2 | |
(simplify_binary_operation...
(simplify_binary_operation, case MULT): Check for case
where width is larger than HOST_BITS_PER_WIDE_INT, and upper most
bit is set. We can not generate a simple shift in this case.
From-SVN: r12238
Diffstat (limited to 'gcc/cse.c')
| -rw-r--r-- | gcc/cse.c | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -3878,6 +3878,11 @@ simplify_binary_operation (code, mode, op0, op1) we are still generating RTL. This test is a kludge. */ if (GET_CODE (op1) == CONST_INT && (val = exact_log2 (INTVAL (op1))) >= 0 + /* If the mode is larger than the host word size, and the + uppermost bit is set, then this isn't a power of two due + to implicit sign extension. */ + && (width <= HOST_BITS_PER_WIDE_INT + || val != HOST_BITS_PER_WIDE_INT - 1) && ! rtx_equal_function_value_matters) return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); |