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| author | Richard Sandiford <rsandifo@redhat.com> | 2002-10-01 10:14:35 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2002-10-01 10:14:35 +0000 |
| commit | d12b8c85a9c84502436fdea354e99bcd9c03338a (patch) | |
| tree | f69c789a027f4f0baede901d54b871c4a8488d62 /gcc/cse.c | |
| parent | 73bff0644500d63d67e70d753784bbc83525b938 (diff) | |
| download | gcc-d12b8c85a9c84502436fdea354e99bcd9c03338a.zip gcc-d12b8c85a9c84502436fdea354e99bcd9c03338a.tar.gz gcc-d12b8c85a9c84502436fdea354e99bcd9c03338a.tar.bz2 | |
mips-protos.h (mips_emit_fcc_reload): Declare.
* config/mips/mips-protos.h (mips_emit_fcc_reload): Declare.
* config/mips/mips.h (PREDICATE_CODES): Add fcc_register_operand.
* config/mips/mips.c (fcc_register_operand): New function.
(mips_emit_fcc_reload): New function, extracted from reload_incc.
(override_options): Allow TFmode values in float registers
if ISA_HAS_8CC.
* cnfig/mips/mips.md (reload_incc): Change destination prediate
to fcc_register_operand. Remove misleading source constraint.
Use mips_emit_fcc_reload.
(reload_outcc): Duplicate reload_incc.
From-SVN: r57683
Diffstat (limited to 'gcc/cse.c')
0 files changed, 0 insertions, 0 deletions