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author | Richard Sandiford <richard.sandiford@arm.com> | 2019-11-19 16:31:17 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-11-19 16:31:17 +0000 |
commit | aa5355781fd8746cb2ac8f0e456f8ac6dc4bf9c5 (patch) | |
tree | 8a6f7d7c8f069bf6cce0e53ce6ca951f18c056d7 /gcc/cse.c | |
parent | 4bf29d15f2e01348a45a1f4e1a135962f123fdd6 (diff) | |
download | gcc-aa5355781fd8746cb2ac8f0e456f8ac6dc4bf9c5.zip gcc-aa5355781fd8746cb2ac8f0e456f8ac6dc4bf9c5.tar.gz gcc-aa5355781fd8746cb2ac8f0e456f8ac6dc4bf9c5.tar.bz2 |
Revert r278441
To restore powerpc bootstrap.
2019-11-19 Richard Sandiford <richard.sandiford@arm.com>
gcc/
Revert:
2019-11-18 Richard Sandiford <richard.sandiford@arm.com>
* cse.c (cse_insn): Delete no-op register moves too.
* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
Take a second comparison to control the value for NE.
(mask_to_comparison): Handle unsigned comparisons.
(simplify_logical_relational_operation): Likewise. Update call
to comparison_to_mask. Handle AND if !HONOR_NANs.
(simplify_binary_operation_1): Call the above for AND too.
gcc/testsuite/
Revert:
2019-11-18 Richard Sandiford <richard.sandiford@arm.com>
* gcc.target/aarch64/sve/acle/asm/ptest_pmore.c: New test.
From-SVN: r278455
Diffstat (limited to 'gcc/cse.c')
-rw-r--r-- | gcc/cse.c | 14 |
1 files changed, 7 insertions, 7 deletions
@@ -4625,7 +4625,7 @@ cse_insn (rtx_insn *insn) for (i = 0; i < n_sets; i++) { bool repeat = false; - bool noop_insn = false; + bool mem_noop_insn = false; rtx src, dest; rtx src_folded; struct table_elt *elt = 0, *p; @@ -5324,17 +5324,17 @@ cse_insn (rtx_insn *insn) } /* Similarly, lots of targets don't allow no-op - (set (mem x) (mem x)) moves. Even (set (reg x) (reg x)) - might be impossible for certain registers (like CC registers). */ + (set (mem x) (mem x)) moves. */ else if (n_sets == 1 - && (MEM_P (trial) || REG_P (trial)) + && MEM_P (trial) + && MEM_P (dest) && rtx_equal_p (trial, dest) && !side_effects_p (dest) && (cfun->can_delete_dead_exceptions || insn_nothrow_p (insn))) { SET_SRC (sets[i].rtl) = trial; - noop_insn = true; + mem_noop_insn = true; break; } @@ -5562,8 +5562,8 @@ cse_insn (rtx_insn *insn) sets[i].rtl = 0; } - /* Similarly for no-op moves. */ - else if (noop_insn) + /* Similarly for no-op MEM moves. */ + else if (mem_noop_insn) { if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn)) cse_cfg_altered = true; |